LTM4686BIVPBF datasheet(23/130 Pages) AD

23 / 130 page

LTM4686B

Rev. 0

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OPERATION

POWER MODULE CONFIGURABILITY AND

READBACK DATA

This section of the data sheet describes all the configu-

rable features and readable data of the LTM4686B acces-

sible via I2C. The relevant command code name(s) are

indicated by use of all capital letters, e.g., “VIN_ON”. Refer

to Table 1 and Appendix C: PMBus Command Details of

this data sheet for details of the command code, payload

size, data format and factory-default value. Specific reg-

ister bits of some registers are indicated with the use of

brackets, i.e., “[” and “]”. The least significant bit (LSB) of

a register is bit number zero, indicated by “[0]”. The most

significant bit of a byte-long (8-bit-long) register is bit

number seven, indicated by “[7]”. The most significant bit

(MSB) of a word-long (16-bit-long) register is bit number

fifteen, indicated by “[15]”. Multiple bits of a register can

be alluded to with the use of a colon, e.g., bits 2, 1 and

0 of the MFR_PWM_CONFIG register are indicated by

“MFR_PWM_CONFIG[2:0]”. Bits can take on values of 0b

or 1b. The subscripted “b” suffix indicates the number’s

value is in binary. Values in hexadecimal are indicated with

a “0x” prefix. For example, decimal value “89” is indicated

by 0x59 and 01011001b (8-bit-long values), as well as

0x0059 and 0000000001011001b (16-bit-long values).

One further shorthand notion the reader will notice is the

italicized “n” or “n”. “n” can take on a value of 0 or 1—and

provides an easy way to refer to registers which are paged

commands, i.e., register names which have the same com-

mand code value but can be configured independently (or

yield channel-specific telemetry) for Channel 0 (Page 0,

or 0x00) vs Channel 1 (Page 1, or 0x01). Registers lack-

ing an “n” are therefore easily identified as being global

in nature, i.e., common to both Channels/Outputs. For

example, the switching frequency setting commanded by

nels, and lacks “n”. Another example: the READ_VIN

the SVIN pin, and SVIN is unique, i.e., common to both

Channels. In contrast, the nominal commanded output

voltage is indicated by the register VOUT_COMMANDn.

The “n” indicates that VOUT_COMMAND can be set dif-

ferently for Channel 0 vs Channel 1. Executing the PAGE

Command (Command Code 0x00) with payload 0x00 sets

the LTM4686B to write/read data pertaining to Channel

0 in all subsequent I2C transactions until the Page is

changed. Executing the PAGE Command with payload

0x01 sets the LTM4686B to write/read data pertaining

to Channel 1 in all subsequent I2C transactions until the

Page is changed. Executing the PAGE Command with pay-

load 0xFF sets the LTM4686B to write data pertaining to

Channels 0 and 1 in all subsequent I2C write transactions

until the Page is changed. Reads from and writes to global

registers do not require setting the Page to 0xFF. Reads

from channel-specific (i.e., non-global) registers when the

Page is set to 0xFF result in the LTM4686B reporting the

value on Page 0x00 (i.e., Channel 0-specific data).

The list below itemizes aspects of the LTM4686B relating

to power supply functions that are configurable by I2C

communications—provided the state of the WP (write

protect) pin and the WRITE_PROTECT register value per-

mit the I2C writes—and by EEPROM settings:

Output start-up voltages (VOUT_COMMANDn), the max-

imum commandable output voltages (VOUT_MAXn),

output margin high (VOUT_MARGIN_HIGHn) and

margin low (VOUT_MARGIN_LOWn) command volt-

ages, and output over/undervoltage warning and fault

thresholds (VOUT_OV_WARN_LIMITn, VOUT_OV_

FAULT_LIMITn, VOUT_UV_WARN_LIMITn, and VOUT_

UV_FAULT_LIMITn). Additionally, these values can be

configured at SVIN power-up according to resistor-pin

strapping of the VOUT0CFG, VTRIM0CFG, VOUT1CFG and/or

VTRIM1CFG pins, provided MFR_CONFIG_ALL[6] = 0b.

Output voltages, on the fly, including transition rate

(∆V/∆t), VOUT_TRANSITION_RATEn— either by I2C

writes to the VOUT_COMMANDn, VOUT_MARGIN_

HIGHn, or VOUT_MARGIN_LOWn registers, and/or to

the OPERATIONn register.

Input undervoltage-lockout, rising (VIN_ON) and input

undervoltage lockout, falling (VIN_OFF), based on the

SVIN pin voltage.

Switching frequency (FREQUENCY_SWITCH) and chan-

nel phase-interleaving angle (MFR_PWM_CONFIG[2:0]).

However, these parameters can be changed via I2C com-

munications only when the LTM4686B’s channels are

off, i.e., not switching. The LTM4686B synchronizes

LTM4686BIVPBF 数据表(PDF) 23 Page - Analog Devices

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