LTM4686BIVPBF datasheet(61/130 Pages) AD

61 / 130 page

LTM4686B

Rev. 0

For more information www.analog.com

APPLICATIONS INFORMATION

PMBus COMMUNICATION AND COMMAND

PROCESSING

The LTM4686B has one deep buffer to hold the last data

written for each supported command prior to processing

as shown in Figure 7; Write Command Data Processing.

When the part receives a new command from the bus,

it copies the data into the Write Command Data Buffer,

indicates to the internal processor that this command data

needs to be fetched, and converts the command to its

internal format so that it can be executed.

DECODER

CMD

INTERNAL

PROCESSOR

WRITE COMMAND

DATA BUFFER

PAGE

CMDS

0x00

0x21

0xFD

4686B F07

•

MFR_RESET

VOUT_COMMAND

CALCULATIONS

PENDING

PMBus

WRITE

FETCH,

CONVERT

DATA

AND

EXECUTE

DATA

MUX

Figure 7. Write Command Data Processing

Two distinct parallel blocks manage command buffering

and command processing (fetch, convert, and execute) to

ensure the last data written to any command is never lost.

Command data buffering handles incoming PMBus writes

by storing the command data to the Write Command Data

Buffer and marking these commands for future process-

ing. The internal processor runs in parallel and handles

the sometimes slower task of fetching, converting and

executing commands marked for processing.

Some computationally intensive commands (e.g., timing

parameters, temperatures, voltages and currents) have

internal processor execution times that may be long

relative to PMBus timing. If the part is busy process-

ing a command, and new command(s) arrive, execution

may be delayed or processed in a different order than

received. The part indicates when internal calculations

are in process via bit 5 of MFR_COMMON (‘calculations

not pending’). When the part is busy calculating, bit 5 is

cleared. When this bit is set, the part is ready for another

command. An example polling loop is provided in Figure 7

which ensures that commands are processed in order

while simplifying error handling routines.

When the part receives a new command while it is busy,

it will communicate this condition using standard PMBus

protocol. Depending on part configuration it may either

NACK the command or return all ones (0xFF) for reads.

It may also generate a BUSY fault and ALERT notifica-

tion, or stretch the SCL clock low. For more information

refer to PMBus Specification v1.2, Part II, Section 10.8.7

and SMBus v2.0 section 4.3.3. Clock stretching can be

enabled by asserting bit 1 of MFR_CONFIG_ALL. Clock

stretching will only occur if enabled and the bus com-

munication speed exceeds 100kHz.

PMBus busy protocols are well accepted standards, but

can make writing system level software somewhat com-

plex. The part provides three ‘hand shaking’ status bits

which reduce complexity while enabling robust system

level communication.

The three hand shaking status bits are in the MFR_

COMMON register. When the part is busy executing an

internal operation, it will clear bit 6 of MFR_COMMON

(‘module not busy’). When the part is busy specifically

because it is in a transitional VOUT state (margining hi/lo,

power off/on, moving to a new output voltage set point,

etc.) it will clear bit 4 of MFR_COMMON (‘output not in

transition’). When internal calculations are in process, the

part will clear bit 5 of MFR_COMMON (‘calculations not

pending’). These three status bits can be polled with a

PMBus read byte of the MFR_COMMON register until all

three bits are set. A command immediately following the

status bits being set will be accepted without NACKing or

generating a BUSY fault/ALERT notification. The part can

NACK commands for other reasons, however, as required

by the PMBus spec (for instance, an invalid command or

data). An example of a robust command write algorithm

for the VOUT_COMMANDn register is provided in Figure 8.

Figure 8. Example of a Command Write of VOUT_COMMAND

// wait until bits 6, 5, and 4 of MFR_COMMON are all set

{

mfrCommonValue = PMBUS_READ_BYTE(0xEF);

partReady = (mfrCommonValue & 0x68) == 0x68;

}while (!partReady)

// now the part is ready to receive the next command

PMBUS_WRITE_WORD(0x21, 0x2000); //write VOUT_COMMAND to 2V

4686B F08

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