LTM4686BIVPBF datasheet(49/130 Pages) AD

49 / 130 page

LTM4686B

Rev. 0

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APPLICATIONS INFORMATION

If a channel is enabled for discontinuous mode opera-

tion, the inductor current is not allowed to reverse. The

reverse current comparator, IREV, turns off the bottom

MOSFET (MBn) just before the inductor current reaches

zero, preventing it from reversing and going negative.

Thus, the controller can operate in discontinuous (pulse-

skipping)operation. In forced continuous operation, the

inductor current is allowed to reverse at light loads or

under large transient conditions. The peak inductor cur-

rent is determined solely by the voltage on the COMPna

pin. In this mode, the efficiency at light loads is lower

than discontinuous mode operation. However, continuous

mode exhibits lower output ripple and less interference

with audio circuitry. Forced continuous conduction mode

may result in reverse inductor current, which can cause

the input supply to boost. The VIN_OV_FAULT_LIMIT can

detect this (if SVIN is connected to VIN0 and/or VIN1) and

turn off the offending channel. However, this fault is based

on an ADC read and can nominally take up to 90ms to

detect. If there is a concern about the input supply boost-

ing, keep the part in discontinuous conduction operation.

SWITCHING FREQUENCY AND PHASE

The switching frequency of the LTM4686B’s channels is

established by its analog phase-locked-loop (PLL) locking

on to the clock present at the module’s SYNC pin. The

clock waveform on the SYNC pin can be generated by the

LTM4686B’s internal circuitry when an external pull-up

resistor to 3.3V (e.g., VDD33) is provided, in combination

with the LTM4686B control IC’s FREQUENCY_SWITCH

command being set to one of the following supported

values: 500kHz, 575kHz, 650kHz, 750kHz, 1MHz (see

Table 8 for hexadecimal values). In this configuration,

the module is called a “sync master”: using the

factory-default setting of MFR_CONFIG_ALL[4] = 0b,

SYNC becomes a bidirectional open-drain pin, and the

LTM4686B pulls SYNC logic low for nominally 500ns at

a time, at the prescribed clock rate. The SYNC signal can

be bused to other LTM4686B modules (configured as

“sync slaves”), for purposes of synchronizing switching

frequencies of multiple modules within a system—but

only one LTM4686B should be configured as a “sync

master”; the other LTM4686B(s) should be configured

as “sync slaves”.

There are two recommended ways to configure an

LTM4686B as a “sync slave”:

• Apply an appropriate pin-strap resistor setting on the

FSWPHCFG pin (see Table 4), and use the factory-default

setting MFR_CONFIG_ALL[6] = 0b. This configures

MFR_CONFIG_ALL[4] = 1b and FREQUENCY_SWITCH

according to EEPROM settings (0x03E8 factory default,

corresponding to 1MHz). The LTM4686B’s SYNC pin

thus becomes a high impedance input and the mod-

ule synchronizes its frequency to that of the externally

applied clock, provided that the frequency of the exter-

nally applied clock exceeds ~45% of the target fre-

quency (FREQUENCY_SWITCH). If the SYNC clock is

absent, the module responds by operating at its target

frequency, indefinitely. If and when the SYNC clock is

restored, the module automatically phase-locks to the

SYNC clock as normal.

• Set FREQUENCY_SWITCH to 0x0000 and MFR_

CONFIG_ALL[4] = 1b. Using MFR_CONFIG_

ALL[4] = 1b, the LTM4686B’s SYNC pin becomes a

high impedance input, only—i.e., it does not drive

SYNC low. The module synchronizes its frequency

to that of the clock applied to its SYNC pin. The only

shortcoming of this approach is: in the absence of an

externally applied clock, the switching frequency of the

module will default to the low end of its frequency-

synchronization capture range.

The FREQUENCY_SWITCH command can be altered

via I2C commands, but only when switching action is

disengaged, i.e., the module’s outputs are turned off.

The FREQUENCY_SWITCH command takes on the value

stored in NVM at SVIN power-up, but is overridden

according to a resistor pin-strap applied between the

FSWPHCFG pin and SGND only if the module is configured

to respect resistor pin-strap settings (MFR_CONFIG_

ALL[6] = 0b). Table 4 highlights available resistor pin-

strap and corresponding FREQUENCY_SWITCH settings.

LTM4686BIVPBF 数据表(PDF) 49 Page - Analog Devices

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