TDA4VEN...Q1 datasheet(207/236 Pages) TI

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6.9.5.19.2 OSPI0 Tap Mode

6.9.5.19.2.1 OSPI0 Tap SDR Timing

Table 6-122, Figure 6-104, Table 6-123, and Figure 6-105 present timing requirements and switching

characteristics for OSPI0 Tap SDR Mode.

Table 6-122. OSPI0 Timing Requirements – Tap SDR Mode

see Figure 6-104

NO.

MODE

MIN

MAX

UNIT

O19

tsu(D-CLK)

Setup time, OSPI0_D[7:0] valid before

active OSPI0_CLK edge

No Loopback

(15.4 -

(0.975T(1)R(2)))

O20

th(CLK-D)

Hold time, OSPI0_D[7:0] valid after active

OSPI0_CLK edge

No Loopback

(- 4.3 +

(0.975T(1)R(2)))

(1)

T = OSPI_RD_DATA_CAPTURE_REG[DELAY_FLD]

(2)

R = reference clock cycle time in ns

OSPI_CLK

OSPI_D[i:0]

OSPI_TIMING_05

O 9

O20

Figure 6-104. OSPI0 Timing Requirements – Tap SDR, No Loopback

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TDA4VEN-Q1, TDA4AEN-Q1

SPRSP96A – MARCH 2024 – REVISED SEPTEMBER 2024

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