FXLS8971CF datasheet(28/100 Pages) NXP

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NXP Semiconductors

FXLS8971CF

3-Axis Low-g Accelerometer

Protocol phase

Description

VDD supply is not present (VDD < VDDmin); MCU and FXLS8971CF are both OFF; all IO pins

are floating/high-z.

VDD ≥ VDDmin; MCU and FXLS8971CF are turned on; FXLS8971CF performs the BOOT

sequence. During this phase, the MOT_DET input and BOOT_OUT open-drain output

functions are enabled. FXLS8971CF turns on the BOOT_OUT output for TPULSE-BOOT2 ms.

Note: The BOOT_OUT pulse is not observable in the wired-AND configuration as it is

assumed the host MCU has not yet enabled the pull-up resistor on the MOT_DET and BOOT_

OUT pins (one pull-up resistor for both pins).

If the MCU has not yet asserted the MOT_DET pin, FXLS8971CF enters Hibernate mode

directly after the BOOT sequence. During this phase, FXLS8971CF MOT_DET pin input

function remains enabled, waiting for the MOT_DET pin to go high, which triggers an exit from

this mode.

The MCU asserts the MOT_DET pin high by enabling the pull-up; FXLS8971CF exits

Hibernate mode and performs the BOOT sequence. Anytime within TPULSE-WIN ms after the

BOOT_OUT pulse rising edge (measured from the VOL point), the host MCU may pulse the

MOT_DET line low to signal the desired motion detection threshold selection. If no pulse is

seen within this window, the default TPULSE-THRES0 threshold value is used. The available pulse

selections are shown in Table 18. The pulse is only recognized if it begins and ends within the

TPULSE-WIN ms period after the BOOT_OUT pulse rising edge, and also conforms to the min

and max values as shown in Table 18. If an invalid pulse width is observed, it is ignored and

the default threshold value used instead.

Motion detection phase: FXLS8971CF continually scans for motion at the preconfigured ODR.

If the motion threshold and debounce criteria are met, a TPULSE-MOT ms pulse is signaled on

the MOT_DET pin (Open-Drain output is turned on). During this phase, the host may also

communicate with FXLS8971CF over the I2C or SPI interfaces.

Hibernate mode: When motion detection is no longer needed, the host MCU drives MOT_DET

low forcing FXLS8971CF into Hibernate mode to conserve power. FXLS8971CF delays the

entry into Hibernate mode for TMOT-HIB ms after the MOT_DET pin is brought low to debounce

the line.

Table 17. BOOT2 sequence and One-wire motion protocol phase descriptions

Selection

Min pulse (µs)

Nom pulse (µs)

Max pulse (µs)

Upper threshold

counts (mg)[1]

Lower threshold

counts (mg)[1]

TPULSE-THRES0

(default)

—

64 (125)

–64 (–125)

TPULSE-THRES1

562.5

625

883

32 (62)

–32 (–62)

TPULSE-THRES2

1125

1250

1570

96 (187)

–96 (–187)

TPULSE-THRES3

2250

2500

2950

128 (250)

–128 (–250)

Table 18. One-wire motion protocol threshold selections

[1]

Threshold mg values assume the default ±4 g FSR is used (sensitivity of 1.95 mg/LSB, typical)

FXLS8971CF

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 2.1 — 7 March 2024

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