FXLS8971CF datasheet(44/100 Pages) NXP

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NXP Semiconductors

FXLS8971CF

3-Axis Low-g Accelerometer

15.2.10 SYS_MODE register (address 14h)

The

SYS_MODE register indicates the current device operating mode. Applications using the Auto-WAKE/

SLEEP mechanism should use this register to synchronize their application with FXLS8971CF operating mode

transitions. This register also indicates the status of the buffer gate error flag and the buffer gate count.

Bit

Name

BUF_

GATE_

ERR

BUF_GATE_CNT[4:0]

SYS_MODE[1:0]

Reset (BT_MODE = GND)

—

Reset (BT_MODE = VDD)

—

Access

Table 45. SYS_MODE register (address 14h) bit allocation

Field

Description

BUF_GATE_ERR

Buffer gate error flag:

0: A buffer gate error has not been detected

1: A buffer gate error was detected.

BUF CONFIG1[BUF _GATE] = 1 and the output buffer is not emptied before the arrival of the

next XYZ acceleration sample, the BUF _GATE_ERR flag is asserted. The BUF GATE_ERR flag

remains asserted as long as the output buffer remains un-emptied.

The BUF GATE_ERR flag may be cleared in one of the following ways:

1. Reading out the entire contents of the output buffer such that

BUF _STATUS[BUF_CNT[5:0]]

= 0.

2. Flushing (clearing) the output buffer contents by setting

BUF_CONFIG2[BUF _FLUSH] = 1.

3. Disabling the output buffer by setting

BUF _CONFIG1[BUF MODE[1:0]] = 00b, which clears

BUF_CNT.

4. Transitioning FXLS8971CF from Standby to Active mode.

6 to 2

BUF_GATE_CNT[4:0]

The BUF_GATE_CNT field contains the number of OOR periods that have elapsed since the

BUF _GATE_ERR flag was asserted.

This buf_gate_cnt field is reset to 0 after any of the following actions:

1. The host reads out the entire contents of the output buffer such that

BUF STATUS[BUF_

CNT[5:0]

] = 0.

2. The host flushes (clears) the output buffer by setting

BUF _CONFIG2[BUF _FLUSH] = 1.

3. Disable the output buffer by setting

BUF CONFIG1[BUF _MODE[1:0]] = 00b, which also

clears the buffer contents.

4. Transitioning FXLS8971CF from Standby to Active mode. which also clears the buffer

contents.

1 to 0

SYS_MODE[1:0]

The current system operating mode

00b: Standby mode (default mode after a POR or soft reset event when BT_MODE = GND)

01b: WAKE mode (default mode after a POR or soft reset event when BT_MODE = VDD and

MOT_DET = 1)

10b: SLEEP mode

11b: EXT_TRIG mode (this mode is unavailable when BT_MODE = VDD)

Notes:

• When external trigger mode is enabled (with SENS_CONFIG4[INT2_FUNC] = 1), while the

device is waiting for a trigger event to occur, SYS_MODE[1:0] is set to 11b. When the trigger

Table 46. SYS_MODE register (address 14h) bit description

FXLS8971CF

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Product data sheet

Rev. 2.1 — 7 March 2024

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