数据搜索系统，热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

预览 PDF HTML

FXLS8971CF 数据表(PDF) 60 Page - NXP Semiconductors

部件名 FXLS8971CF
功能描述  3-Axis Low-g Accelerometer
PDF  100 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

FXLS8971CF 数据表(HTML) 60 Page - NXP Semiconductors

Back Button FXLS8971CF Datasheet HTML 56Page - NXP Semiconductors FXLS8971CF Datasheet HTML 57Page - NXP Semiconductors FXLS8971CF Datasheet HTML 58Page - NXP Semiconductors FXLS8971CF Datasheet HTML 59Page - NXP Semiconductors FXLS8971CF Datasheet HTML 60Page - NXP Semiconductors FXLS8971CF Datasheet HTML 61Page - NXP Semiconductors FXLS8971CF Datasheet HTML 62Page - NXP Semiconductors FXLS8971CF Datasheet HTML 63Page - NXP Semiconductors FXLS8971CF Datasheet HTML 64Page - NXP Semiconductors Next Button
Zoom Inzoom in Zoom Outzoom out
 60 / 100 page
background image
NXP Semiconductors
FXLS8971CF
3-Axis Low-g Accelerometer
Bit
7
6
5
4
3
2
1
0
Name
OFF_X[7:0]
Reset
0
0
0
0
0
0
0
0
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Table 75. OFF_X register (addresses 22h) bit allocation
Bit
7
6
5
4
3
2
1
0
Name
OFF_Y[7:0]
Reset
0
0
0
0
0
0
0
0
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Table 76. OFF_Y register (addresses 23h) bit allocation
Bit
7
6
5
4
3
2
1
0
Name
OFF_Z[7:0]
Reset
0
0
0
0
0
0
0
0
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Table 77. OFF_Z register (addresses 24h) bit allocation
15.3.14 BUF_CONFIG1 register (address 26h)
The BUF_CONFIG1 register controls the output buffer read order, data collection mode and trigger event
sources.
Bit
7
6
5
4
3
2
1
0
Name
BUF_TYPE
BUF_MODE[1:0]
BUF_GATE
TRIG_
SDCD_WT
TRIG_
SDCD_OT
—
TRIG_
ORIENT
Reset
0
0
0
0
0
0
0
0
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Table 78. BUF_CONFIG1 register (address 26h) bit allocation
Field
Description
7
BUF_TYPE
Buffer data read out order:
0: First In First Out (FIFO). Default
In FIFO mode, the oldest sample data is read out first, followed by the more recent sample data.
1: First In Last Out (LIFO).
In LIFO mode, the newest data sample is read out first, followed by the older sample data.
Note: It is not possible to change the buffer operating mode without first clearing the SENS_
CONFIG1[ACTIVE] and SENS_CONFIG4[INT2_FUNC] bits.
6 to 5
BUF_MODE[1:0]
Buffer data collection mode:
00: Buffer is disabled.
Table 79. BUF_CONFIG1 register (address 26h) bit description
FXLS8971CF
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Product data sheet
Rev. 2.1 — 7 March 2024
60 / 100



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com