FXLS8971CF datasheet(75/100 Pages) NXP

75 / 100 page

NXP Semiconductors

FXLS8971CF

3-Axis Low-g Accelerometer

This register sets the minimum number of debounce counts needed to recognize the SDCD within-threshold

condition as true.

A transition from Standby to Active, Active to Standby, or a change in an Auto-WAKE/SLEEP mode change

resets the internal counter.

Bit

Name

SDCD_WT_DBCNT[7:0]

Reset (BT_MODE = GND)

Reset (BT_MODE = VDD)

Access

R/W

Table 106. SDCD_WT_DBCNT register (address 32h) bit allocation

Field

Description

7 to 0

SDCD_WT_

DBCNT[7:0]

The SDCD_WT_DBCNT value defines the minimum number of debounce sample counts required

for the detection of an SDCD_WT condition event. The WT_DBCNTM bit determines the behavior of

the counter when the condition of interest is momentarily not true. The time step for the counter is the

same as the selected ODR period (or effective ODR period in FPM).

Table 107. SDCD_WT_DBCNT register (address 32h) bit description

15.5.7 SDCD_LTHS_LSB register (address 33h)

Sensor Data Change Detection function 12-bit 2's complement lower threshold least significant byte.

SDCD_LTHS[11:0] must always be set to a lower value than SDCD_UTHS[11:0] to ensure that the SDCD

circuit functions correctly and produces meaningful results.

The scaling for this register is always the same as the selected FSR sensitivity. See Section 9 for the sensitivity

values corresponding to each of the selectable FSRs.

Bit

Name

SDCD_LTHS[7:0]

Reset (BT_MODE = GND)

Reset (BT_MODE = VDD)

Access

R/W

Table 108. SDCD_LTHS_LSB register (address 33h) bit allocation

Field

Description

7 to 0

SDCD_LTHS[7:0]

LSB of the signed 12-bit 2's complement lower threshold value.

Table 109. SDCD_LTHS_LSB register (address 33h) bit description

15.5.8 SDCD_LTHS_MSB register (address 34h)

Sensor Data Change Detection function 12-bit 2's complement lower threshold most significant byte (nibble).

SDCD_LTHS[11:0] must always be set to a lower value than SDCD_UTHS[11:0] to ensure that the SDCD

circuit functions correctly and produces meaningful results.

FXLS8971CF

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 2.1 — 7 March 2024

75 / 100

FXLS8971CF 数据表(PDF) 75 Page - NXP Semiconductors

FXLS8971CF 数据表(HTML) 75 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100

数据表下载