HD64F2149YV datasheet(169/1075 Pages) RENESAS

169 / 1075 page

Section 6 Bus Controller

Rev. 3.00 Jan 18, 2006 page 141 of 1044

REJ09B0280-0300

6.1.3

Pin Configuration

Table 6.1 summarizes the pins of the bus controller.

Table 6.1

Bus Controller Pins

Name

Symbol

I/O

Function

Address strobe

Output

Strobe signal indicating that address output on

address bus is enabled (when IOSE bit is 0)

I/O select

IOS

Output

I/O select signal (when IOSE bit is 1)

Read

Output

Strobe signal indicating that external space is

being read

High write

HWR

Output

Strobe signal indicating that external space is

being written to, and that the upper data bus

(D15 to D8) is enabled

Low write

LWR

Output

Strobe signal indicating that external space is

being written to, and that the lower data bus

(D7 to D0) is enabled

Wait

WAIT

Input

Wait request signal when external 3-state

access space is accessed

6.1.4

Table 6.2 summarizes the registers of the bus controller.

Table 6.2

Bus Controller Registers

Name

Abbreviation

R/W

Initial Value

Address*

Bus control register

BCR

R/W

H'D7

H'FFC6

Wait state control register

WSCR

R/W

H'33

H'FFC7

Note:

Lower 16 bits of the address.

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