HD64F2149YV datasheet(310/1075 Pages) RENESAS

310 / 1075 page

Section 9 8-Bit PWM Timers

Rev. 3.00 Jan 18, 2006 page 282 of 1044

REJ09B0280-0300

9.1.2

Block Diagram

Figure 9.1 shows a block diagram of the PWM timer module.

PWDR0

PWDR1

PWDR2

PWDR3

PWDR4

PWDR5

PWDR6

PWDR7

PWDR8

PWDR9

PWDR10

PWDR11

PWDR12

PWDR13

PWDR14

PWDR15

P10/PW0

P11/PW1

P12/PW2

P13/PW3

P14/PW4

P15/PW5

P16/PW6

P17/PW7

P20/PW8

P21/PW9

P22/PW10

P23/PW11

P24/PW12

P25/PW13

P26/PW14

P27/PW15

Comparator 0

Comparator 1

Comparator 2

Comparator 3

Comparator 4

Comparator 5

Comparator 6

Comparator 7

Comparator 8

Comparator 9

Comparator 10

Comparator 11

Comparator 12

Comparator 13

Comparator 14

Comparator 15

PWDPRB

PWOERB

P2DDR

P2DR

PWDPRA

PWOERA

P1DDR

P1DR

Module

data bus

Internal

data bus

PWSL

Clock

selection

Internal clock

φ/2

Legend:

PWSL:

PWDR:

PWDPRA:

PWDPRB:

PWOERA:

PWOERB:

PCSR:

P1DDR:

P2DDR:

P1DR:

P2DR:

PWM register select

PWM data register

PWM data polarity register A

PWM data polarity register B

PWM output enable register A

PWM output enable register B

Peripheral clock select register

Port 1 data direction register

Port 2 data direction register

Port 1 data register

Port 2 data register

TCNT

PCSR

φ/4

φ/8

φ/16

Figure 9.1 Block Diagram of PWM Timer Module

HD64F2149YV 数据表(PDF) 310 Page - Renesas Technology Corp

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