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AD9520-5/PCBZ 数据表(PDF) 54 Page - Analog Devices |
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AD9520-5/PCBZ 数据表(HTML) 54 Page - Analog Devices |
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54 / 80 page ![]() AD9520-5 Rev. 0 | Page 54 of 80 If the AD9520 register map were continuous from Address 0x000 to Address 0x232, only one register section definition group would consist of a starting address of 0x000 and a length of 563 bytes. However, this is not the case. The AD9520 register map is noncontiguous, and the EEPROM is only 512 bytes long. Therefore, the register section definition group tells the EEPROM controller how the AD9520 register map is segmented. There are three operational codes: IO_UPDATE, end-of-data, and pseudo-end-of-data. It is important that the EEPROM buffer segment always have either an end-of-data or a pseudo-end-of-data operational code and that an IO_UPDATE operation code appear at least once before the end-of-data op code. Register Section Definition Group The register section definition group is used to define a continuous register section for the EEPROM profile. It consists of three bytes. The first byte defines how many continuous register bytes are in this group. If the user puts 0x000 in the first byte, it means there is only one byte in this group. If the user puts 0x001, it means there are two bytes in this group. The maximum number of registers in one group is 128. The next two bytes are the low byte and high byte of the memory address (16-bit) of the first register in this group. IO_UPDATE (Operational Code 0x80) The EEPROM controller uses this operational code to generate an IO_UPDATE signal to update the active control register bank from the buffer register bank during the download process. At a minimum, there should be at least one IO_UPDATE operational code after the end of the final register section definition group. This is needed is so that at least one IO_UPDATE occurs after all of the AD9520 registers are loaded when the EEPROM is read. If this operational code is absent during a write to the EEPROM, the register values loaded from the EEPROM are not transferred to the active register space, and these values do not take effect after they are loaded from the EEPROM to the AD9520. End-of-Data (Operational Code 0xFF) The EEPROM controller uses this operational code to terminate the data transfer process between EEPROM and the control register during the upload and download process. The last item appearing in the EEPROM buffer segment should be either this operational code or the pseudo-end-of-data operational code. Pseudo-End-of-Data (Operational Code 0xFE) The AD9520 EEPROM buffer segment has 23 bytes that can contain up to seven register section definition groups. If users want to define more than seven register section definition groups, the pseudo-end-of-data operational code can be used. During the upload process, when the EEPROM controller receives the pseudo-end-of-data operational code, it halts the data transfer process, clears the REG2EEPROM bit, and enables the AD9520 serial port. Users can then program the EEPROM buffer segment again and reinitiate the data transfer process by setting the REG2EEPROM bit (0xB03) to 1 and the IO_UPDATE register (0x232) to 1. The internal I2C master then begins writing to the EEPROM starting from the EEPROM address held from the last writing. This sequence enables more discrete instructions to be written to the EEPROM than would otherwise be possible due to the limited size of the EEPROM buffer segment. It also permits the user to write to the same register multiple times with a different value each time. Table 42. Example of EEPROM Buffer Segment Reg Addr (Hex) Bit 7 (MSB) Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 (LSB) Start EEPROM Buffer Segment 0xA00 0 Number of bytes [6:0] of the first group of registers 0xA01 Address [15:8] of the first group of registers 0xA02 Address [7:0] of the first group of registers 0xA03 0 Number of bytes [6:0] of the second group of registers 0xA04 Address [15:8] of the second group of registers 0xA05 Address [7:0] of the second group of registers 0xA06 0 Number of bytes [6:0] of the third group of registers 0xA07 Address [15:8] of the third group of registers 0xA08 Address [7:0] of the third group of registers 0xA09 IO_UPDATE operational code (0x80) 0xA0A End-of-data operational code (0xFF) |
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