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AD9520-5/PCBZ 数据表(PDF) 22 Page - Analog Devices

部件名 AD9520-5/PCBZ
功能描述  12 LVPECL/24 CMOS Output Clock Generator
PDF  80 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9520-5/PCBZ 数据表(HTML) 22 Page - Analog Devices

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AD9520-5
Rev. 0 | Page 22 of 80
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
07
2pF
10pF
20pF
600
500
400
300
200
100
FREQUENCY (MHz)
00
Figure 18. CMOS Output Swing vs. Frequency and Capacitive Load
–100
–110
–120
–130
–140
–150
–160
10
1k
100
100M
1M
10M
100k
10k
FREQUENCY (Hz)
Figure 19. Additive (Residual) Phase Noise, CLK-to-LVPECL @
245.76 MHz, Divide-by-1
–100
–110
–120
–130
–140
–150
–160
10
1k
100
100M
1M
10M
100k
10k
FREQUENCY (Hz)
Figure 20. Additive (Residual) Phase Noise, CLK-to-LVPECL @
1600 MHz, Divide-by-1
–110
–120
–130
–140
–150
–170
–160
10
1k
100
100M
1M
10M
100k
10k
FREQUENCY (Hz)
Figure 21. Additive (Residual) Phase Noise, CLK-to-CMOS @
50 MHz, Divide-by-20



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