ST7263BEx datasheet(115/186 Pages) STMICROELECTRONICS

115 / 186 page

ST7263Bxx

On-chip peripherals

Doc ID 7516 Rev 8

115/186

Figure 48.

Transfer sequencing

Legend:

S=Start, P=Stop, A=Acknowledge, NA=Non-acknowledge

EVx=Event (with interrupt if ITE=1)EV1: EVF=1, ADSL=1, cleared by reading the SR1 register.

EV2: EVF=1, BTF=1, cleared by reading the SR1 register followed by reading the DR

EV3: EVF=1, BTF=1, cleared by reading the SR1 register followed by writing the DR

EV3-1: EVF=1, AF=1, BTF=1; AF is cleared by reading the SR1 register. The BTF is cleared

by releasing the lines (STOP=1, STOP=0) or by writing the DR register (DR=FFh).

Note: If lines are released by STOP=1, STOP=0, the subsequent EV4 is not seen.

EV4: EVF=1, STOPF=1, cleared by reading the SR2 register.

EV5: EVF=1, SB=1, cleared by reading the SR1 register followed by writing the DR register.

EV6: EVF=1, cleared by reading the SR1 register followed by writing the CR register

(for example PE=1).

EV7: EVF=1, BTF=1, cleared by reading the SR1 register followed by reading the DR

EV8: EVF=1, BTF=1, cleared by reading the SR1 register followed by writing the DR

Table 37.

Slave receiver

Addres

Data1

Data2

.....

DataN

Table 38.

Slave Transmitter

Addres

Data1

Data2

.....

DataN

EV3

-1

Table 39.

Master receiver

Addres

Data1

Data2

.....

DataN

Table 40.

Master Transmitter

Addres

Data1

Data2

.....

DataN

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