ST7263BEx datasheet(116/186 Pages) STMICROELECTRONICS

部件名	ST7263BEx

功能描述	Low speed USB 8-bit MCU family with up to 32 KB Flash/ROM, DFU capability, 8-bit ADC, WDG, timer, SCI and I²C

PDF	186 Pages

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制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

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116 / 186 page

On-chip peripherals

ST7263Bxx

116/186

Doc ID 7516 Rev 8

11.5.5

Low power modes

11.5.6

Interrupts

Figure 49.

Event flags and interrupt generation

EVF can also be set by EV6 or an error from the SR2 register.

The I²C interrupt events are connected to the same interrupt vector (see Interrupts chapter).

They generate an interrupt if the corresponding Enable Control Bit is set and the I-bit in the

CC register is reset (RIM instruction).

Table 41.

Low power modes

Mode

Description

WAIT

No effect on I²C interface.

I²C interrupts cause the device to exit from Wait mode.

HALT

I²C registers are frozen.

In Halt mode, the I²C interface is inactive and does not acknowledge data on the bus. The

I²C interface resumes operation when the MCU is woken up by an interrupt with “exit from

Halt mode” capability.

Table 42.

Interrupts

Interrupt event

Event

flag

Enable

control

bit

Exit

from

Wait

Exit

from

Halt

End of Byte Transfer Event

BTF

ITE

Yes

Address Matched Event (Slave mode)

ADSL

Yes

Start Bit Generation Event (Master mode)

Yes

Acknowledge Failure Event

Yes

Stop Detection Event (Slave mode)

STOPF

Yes

Arbitration Lost Event (Multimaster configuration)

ARLO

Yes

Bus Error Event

BERR

Yes

BTF

ADSL

STOPF

ARLO

BERR

EVF

INTERRUPT

ITE

(1)

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