AD9525SLASHPCBZ datasheet(27/48 Pages) AD

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Data Sheet

AD9525

Rev. 0 | Page 27 of 48

SERIAL CONTROL PORT

The AD9525 serial control port is a flexible, synchronous serial

communications port that allows an easy interface with many

industry-standard microcontrollers and microprocessors. The

AD9525 serial control port is compatible with most synchronous

transfer formats, including Motorola® SPI and Intel® SSR protocols.

The serial control port allows read/write access to all registers

that configure the AD9525.

PIN DESCRIPTIONS

SCLK (serial clock) is the serial shift clock. This pin is an input.

SCLK is used to synchronize serial control port reads and writes.

Write data bits are registered on the rising edge of this clock,

and read data bits are registered on the falling edge. This pin is

internally pulled down by a 30 kΩ resistor to ground.

SDIO (serial data input/output) is a dual-purpose pin that acts

either as an input only (unidirectional mode) or as an input/

output (bidirectional mode). The AD9525 defaults to the

bidirectional I/O mode (Register 0x000[7] = 0b).

SDO (serial data out) is used only in the unidirectional I/O mode

(Register 0x000[7] = 1b) as a separate output pin for reading back

data.

CS (chip select bar) is an active low control that gates the read

and write cycles. When CS is high, SDO and SDIO are in a high

impedance state. This pin is internally pulled up by a 30 kΩ

resistor to VS.

AD9525

SERIAL PORT

CONTROL

(SPI)

SCLK

SDO

SDIO

Figure 26. Serial Control Port

GENERAL OPERATION OF SERIAL CONTROL PORT

Single byte or multiple byte transfers are supported, as well as

MSB first or LSB first transfer formats. The AD9525 serial control

port can be configured for a single bidirectional I/O pin (SDIO

only) or for two unidirectional I/O pins (SDIO/SDO). By default,

the AD9525 is in bidirectional mode. Short instruction mode

(8-bit instruction) is not supported. Only long instruction mode

(16-bit instruction) is supported.

A write or a read operation to the AD9525 is initiated by

pulling CS low.

The CS stalled high mode is supported in data transfers where

three or fewer bytes of data (plus instruction data) are transferred

(see Table 24). In this mode, the CS pin can temporarily return

high on any byte boundary, allowing time for the system controller

to process the next byte. CS can go high on byte boundaries only

and can go high during either part (instruction or data) of the

transfer.

During this period, the serial control port state machine enters

a wait state until all data is sent. If the system controller decides

to abort the transfer before all of the data is sent, the state machine

must be reset, either by completing the remaining transfers or

by returning CS low for at least one complete SCLK cycle (but

fewer than eight SCLK cycles). Raising the CS pin on a nonbyte

boundary terminates the serial transfer and flushes the buffer.

In the streaming mode (see Table 25), any number of data bytes

can be transferred in a continuous stream. The register address

is automatically incremented or decremented (see the MSB/LSB

First Transfers section). CS must be raised at the end of the last

byte to be transferred, thereby ending streaming mode.

Communication Cycle—Instruction Plus Data

There are two parts to a communication cycle with the AD9525.

The first part writes a 16-bit instruction word into the AD9525,

coincident with the first 16 SCLK rising edges. The instruction

word provides the AD9525 serial control port with information

regarding the data transfer, which is the second part of the

communication cycle. The instruction word defines whether

the upcoming data transfer is a read or a write, the number of

bytes in the data transfer, and the starting register address for

the first byte of the data transfer.

Write

If the instruction word is for a write operation, the second part

is the transfer of data into the serial control port buffer of the

AD9525. Data bits are registered on the rising edge of SCLK.

The length of the transfer (one, two, or three bytes or streaming

mode) is indicated by two bits ([W1:W0]) in the instruction

byte. When the transfer is one, two, or three bytes but not

streaming, CS can be raised after each sequence of eight bits to

stall the bus (except after the last byte, where it ends the cycle).

When the bus is stalled, the serial transfer resumes when CS is

lowered. Raising the CS pin on a nonbyte boundary resets the

serial control port. During a write, streaming mode does not

skip over reserved or blank registers, and the user can write

0x00 to the reserved register addresses.

Because data is written into a serial control port buffer area,

not directly into the actual control registers of the AD9525, an

additional operation is needed to transfer the serial control port

buffer contents to the actual control registers of the AD9525,

thereby causing them to become active. The update registers

operation (IO_UPDATE) consists of setting Register 0x232[0] =

1b (this bit is self-clearing). Any number of bytes of data can be

changed before executing an update registers. The update registers

operation simultaneously actuates all register changes that have

been written to the buffer since any previous update.

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