AD9525SLASHPCBZ datasheet(40/48 Pages) AD

40 / 48 page

AD9525

Data Sheet

Rev. 0 | Page 40 of 48

Table 38. PLL Readback

Reg.

Addr.

(Hex)

Bits

Bit Name

Description

0x01F

[7:5]

Unused

Selected reference

Shows the reference used by the PLL

0: REFA

1: REFB

Status feedback clock

Status of the feedback clock, as determined by the selected reference

0: missing

1: present

Status REFB

Status of Reference B clock, as determined by the feedback clock

0: missing

1: present

Status REFA

Status of Reference A clock, as determined by the feedback clock

0: missing

1: present

Digital lock detect (DLD)

Digital lock detect

0: PLL not locked

1: PLL locked

Table 39. LVPECL Drivers OUT0

Reg.

Addr.

(Hex)

Bits

Bit Name

Description

0x0F0

[7:5]

Don’t care

Power down Channel 0 and

Channel 1

Powers down Channel 0 and Channel 1

0: enabled (default)

1: power-down

Don’t care

[2:1]

OUT0 level

Bit 1

Bit 0

VOD (mV)

400

600

780 (default)

960

OUT0 driver power-down

0: enabled (default)

1: power-down

Table 40. LVPECL Drivers OUT1

Reg.

Addr.

(Hex)

Bits

Bit Name

Description

0x0F1

[7:5]

Don’t care

Reserved

Reserved, write 0

Don’t care

[2:1]

OUT1 level

Bit 1

Bit 0

VOD (mV)

400

600

780 (default)

960

OUT1 driver power-down

0: enabled (default)

1: power-down

AD9525/PCBZ 数据表(PDF) 40 Page - Analog Devices

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AD9525/PCBZ 数据表(PDF) 40 Page - Analog Devices

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