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AD9525/PCBZ 数据表(PDF) 9 Page - Analog Devices |
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AD9525/PCBZ 数据表(HTML) 9 Page - Analog Devices |
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9 / 48 page  Data Sheet AD9525 Rev. 0 | Page 9 of 48 CLOCK OUTPUT ABSOLUTE TIME JITTER (CLOCK GENERATION USING EXTERNAL 2.05 GHZ VCO) Table 14. Parameter Min Typ Max Unit Test Conditions/Comments LVPECL OUTPUT ABSOLUTE TIME JITTER Application example based on a typical setup using an external 2.05 MHz VCO (Bowei Model MVCO- 2050A); reference = 122.054215 MHz; R divider = 12; PLL LBW = 5 kHz FOUT = 2048.867 MHz 19 fs rms Integration BW = 200 kHz to 5 MHz 21 fs rms Integration BW = 200 kHz to 10 MHz 87 fs rms Integration BW = 12 kHz to 20 MHz Reference Sideband Spurs −105 dBc ±10.671MHz CLOCK OUTPUT ABSOLUTE TIME JITTER (CLOCK GENERATION USING EXTERNAL 3 GHZ VCO) Table 15. Parameter Min Typ Max Unit Test Conditions/Comments LVPECL OUTPUT ABSOLUTE TIME JITTER Application example based on a typical setup using an external 2950 MHz VCO (Z-Communications Model CRO-2950); reference = 122.88 MHz; R divider = 1 FOUT = 2949.12 MHz; PLL LBW = 7 kHz 63 fs rms Integration BW = 1 kHz to 100 MHz 38 fs rms Integration BW = 10 kHz to 100 MHz 34 fs rms Integration BW = 10 kHz to 40 MHz 28 fs rms Integration BW = 12 kHz to 20 MHz Reference Sideband Spurs −99 dBc ±122.88 MHz FOUT = 1474.56 MHz; PLL LBW = 7 kHz 62 fs rms Integration BW = 1 kHz to 100 MHz 36 fs rms Integration BW = 10 kHz to 100 MHz 31 fs rms Integration BW = 10 kHz to 40 MHz 25 fs rms Integration BW = 12 kHz to 20 MHz Reference Sideband Spurs −100 dBc ±122.88 MHz FOUT = 491.52 MHz; PLL LBW = 7 kHz 78 fs rms Integration BW = 1 kHz to 100 MHz 60 fs rms Integration BW = 10 kHz to 100 MHz 44 fs rms Integration BW = 10 kHz to 40 MHz 33 fs rms Integration BW = 12 kHz to 20 MHz Reference Sideband Spurs −96 dBc ±122.88 MHz CLOCK OUTPUT ADDITIVE PHASE NOISE (DISTRIBUTION ONLY; CLOCK INPUT TO DISTRIBUTION OUTPUT, INCLUDING VCO DIVIDER) Table 16. Parameter Min Typ Max Unit Test Conditions/Comments CLK-TO-LVPECL ADDITIVE PHASE NOISE Distribution section only; does not include PLL and VCO CLK = 2949.12 MHz, FOUT = 2949.12 MHz Divider = 1 At 10 Hz Offset −112 dBc/Hz At 100 Hz Offset −122 dBc/Hz At 1 kHz Offset −133 dBc/Hz At 10 kHz Offset −141 dBc/Hz At 100 kHz Offset −146 dBc/Hz At 800 kHz Offset −148 dBc/Hz At 1 MHz Offset −148 dBc/Hz At 10 MHz Offset −149 dBc/Hz At 100 MHz Offset −151 dBc/Hz |
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