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AD9525/PCBZ 数据表(PDF) 14 Page - Analog Devices

部件名 AD9525/PCBZ
功能描述  Low Jitter Clock Generator with Eight LVPECL Outputs
PDF  48 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9525/PCBZ 数据表(HTML) 14 Page - Analog Devices

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AD9525
Data Sheet
Rev. 0 | Page 14 of 48
Pin No.
Mnemonic
Type
Description
28
SDO
I
Serial Control Port Unidirectional Serial Data Out.
29
GND
GND
Connect to ground.
30
SYNC_OUT
O
LVPECL Complementary Output for Programmable Sync Signal.
31
SYNC_OUT
O
LVPECL Output for Programmable Sync Signal.
32
VDD3
P
Power Supply for SYNC_OUT Driver.
33
REF_MON
O
Reference Monitor (Output). This pin has multiple selectable outputs.
34
OUT7
O
LVPECL Complementary Output 7.
35
OUT7
O
LVPECL Output 7.
36
VDD3
P
3.3 V Power Supply for Channel OUT6 and Channel OUT7.
37
OUT6
O
LVPECL Complementary Output 6.
38
OUT6
O
LVPECL Output 6.
39
OUT5
O
LVPECL Complementary Output 5.
40
OUT5
O
LVPECL Output 5.
41
VDD3
P
3.3 V Power Supply for Channel OUT4 and Channel OUT5.
42
OUT4
O
LVPECL Complementary Output 4.
43
OUT4
O
LVPECL Output 4.
44
OUT3
O
LVPECL Complementary Output 3.
45
OUT3
O
LVPECL Output 3.
46
VDD3
P
3.3 V Power Supply for Channel OUT2 and Channel OUT3.
47
OUT2
O
LVPECL Complementary Output 2.
48
OUT2
O
LVPECL Output 2.
EP
EP, GND
GND
Exposed Paddle. The exposed pad is a ground connection on the chip that must be soldered to the analog
ground of the PCB to ensure proper functionality and heat dissipation, noise, and mechanical strength
benefits.



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