AD9525SLASHPCBZ datasheet(38/48 Pages) AD

38 / 48 page

AD9525

Data Sheet

Rev. 0 | Page 38 of 48

Table 34. Lock Detect

Reg.

Addr.

(Hex)

Bits

Bit Name

Description

0x019

[7:4]

Don’t care

Don’t care.

[3:2]

Lock detect

counter

Required consecutive number of PFD cycles with edges inside lock detect window before the DLD

indicates a locked condition.

Bit 3

Bit 2

PFD Cycles to Determine Lock

5 (default)

255

Digital lock detect

window

If the time difference of the rising edges at the inputs to the PFD is less than the lock detect window time,

the digital lock detect flag is set. The flag remains set until the time difference is greater than the loss-

of-lock threshold.

0: high range (default).

1: low range.

Digital lock detect

disable

Digital lock detect operation.

0: normal lock detect operation (default).

1: disables lock detect.

Table 35. Reference Switchover and Monitors

Reg.

Addr.

(Hex)

Bits

Bit Name

Description

0x01A

Enable feedback

clock present

monitor

Enables feedback clock monitor. The presence of a feedback clock is checked with the selected

reference to the PLL. This monitor does not have a value output if there is no reference to the PLL.

0: disables monitor (default).

1: enables monitor.

Enable REFB

present monitor

Enables Reference B clock monitor. The presence of the REFB clock is checked with the feedback clock

to the PLL. This monitor does not have a value output if there is no feedback clock to the PLL.

0: disables monitor (default).

1: enables monitor.

Enable REFA

present monitor

Enables Reference A clock monitor. The presence of the REFA clock is checked with the feedback clock

to the PLL. This monitor does not have a value output if there is no feedback clock to the PLL.

0: disables monitor (default).

1: enables monitor.

Disable switchover

deglitch

Disables or enables the switchover deglitch circuit.

0: enables switchover deglitch circuit (default).

1: disables switchover deglitch circuit.

Select REFB

(manual register

mode)

If Register 0x01A[1] = 0, selects reference for PLL.

0: selects REFA.

1: selects REFB.

Stay on REFB

Stays on REFB after switchover.

0: returns to REFA automatically when REFA status is good again.

1: stays on REFB after switchover. Do not automatically return to REFA.

Use REF_SEL pin

for reference

switchover

If Register 0x01A[0] = 0 (manual), sets method of PLL reference selection.

0: uses Register 0x01A[3] (default).

1: uses REF_SEL pin.

Enable automatic

ref switchover

Automatic or manual reference switchover.

0: manual reference switchover.

1: automatic reference switchover.

AD9525/PCBZ 数据表(PDF) 38 Page - Analog Devices

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AD9525/PCBZ 数据表(PDF) 38 Page - Analog Devices

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