AD9525SLASHPCBZ datasheet(15/48 Pages) AD

部件名	AD9525/PCBZ

功能描述	Low Jitter Clock Generator with Eight LVPECL Outputs

PDF	48 Pages

Scroll/Zoom	100%

制造商	AD [Analog Devices]

网页	http://www.analog.com

标志

15 / 48 page

Data Sheet

AD9525

Rev. 0 | Page 15 of 48

TYPICAL PERFORMANCE CHARACTERISTICS

VOLTAGE ON CP PIN (V)

PUMP UP

PUMP DOWN

Figure 5. Charge Pump Characteristics at VDD_CP = 3.3 V

VOLTAGE ON CP PIN (V)

PUMP UP

PUMP DOWN

Figure 6. Charge Pump Characteristics at VDD_CP = 5.0 V

–222.5

–222.0

–221.5

–221.0

–220.5

–220.0

–219.5

–219.0

–218.5

–218.0

–217.5

0.2

0.4

0.6

0.8

1.0

1.2

SLEW RATE OF REFA (V/ns)

Figure 7. PLL Figure of Merit (FOM) vs. Slew Rate at REFA

CH1

500mV Ω

2.5ns/DIV

40.0GS/s

A CH1

40.0mV

Figure 8. LVPECL Output (Differential) at 122.88 MHz

0.5

0.7

0.9

1.1

1.3

1.5

1.7

1.9

2.1

2.3

2.5

500

1000

1500

2000

2500

3000

FREQUENCY (MHz)

960mV p-p

780mV p-p

600mV p-p

400mV p-p

Figure 9. LVPECL Differential Voltage Swing vs. Frequency

AD9525/PCBZ 数据表(PDF) 15 Page - Analog Devices

AD9525/PCBZ 数据表(HTML) 15 Page - Analog Devices

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