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JS28F256P33BFE 数据表(PDF) 63 Page - Micron Technology

部件名 JS28F256P33BFE
功能描述  NumonyxTM StrataFlash Embedded Memory
PDF  90 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  MICRON [Micron Technology]
网页  http://www.micron.com
标志 MICRON - Micron Technology

JS28F256P33BFE 数据表(HTML) 63 Page - Micron Technology

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Datasheet
Aug 2009
63
Order Number:320003-08
P33-65nm
Table 31: CFI Identification
Offset
Length
Description
Add.
Hex
Code
Value
10h
3
Query-unique ASCII string “QRY”.
10:
11:
12:
--51
--52
--59
“Q”
“R”
“Y”
13h
2
Primary Vendor command set and control interface ID code.
16-bit ID code for Vendor-specified algorithms.
13:
14:
--01
--00
15h
2
Extended Query Table primay algorithm address.
15:
16:
--0A
--01
17h
2
Alernate vendor command set and control interface ID code.
0000h means no second vendor-specified alorithm exists.
17:
18:
--00
--00
19h
2
Secondary algorithm Extended Query Table address.
0000h means none exists.
19:
1A:
--00
--00
Table 32: System Interface Information
Offset
Length
Description
Add
Hex
Code
Value
1Bh
1
VCC logic supply minimum program/erase voltage
bits 0-3 BCD 100 mV
bits 4-7 BCD volts
1B:
--23
2.3V
1Ch
1
VCC logic supply maximum program/erase voltage
bits 0-3 BCD 100 mV
bits 4-7 BCD volts
1C:
--36
3.6V
1Dh
1
VPP [programming] supply minimum program/erase voltage
bits 0-3 BCD 100 mV
bits 4-7 HEX volts
1D:
--85
8.5V
1Eh
1
VPP [programming] supply maximum program/erase voltage
bits 0-3 BCD 100 mV
bits 4-7 HEX volts
1E:
--95
9.5V
1Fh
1
“n” such that typical single word program time-out = 2n
µ-sec
1F:
--08
256
µs
20h
1
“n” such that typical full buffer write time-out = 2n
µ-sec
20:
--0A
1024
µs
21h
1
“n” such that typical block erase time-out = 2n m-sec
21:
--0A
1s
22h
1
“n” such that typical full chip erase time-out = 2n m-sec
22:
--00
NA
23h
1
“n” such that maximum word program time-out = 2n times typical
23:
--01
512
µs
24h
1
“n” such that maximum buffer write time-out = 2n times typical
24:
--02
4096
µs
25h
1
“n” such that maximum block erase time-out = 2n times typical
25:
--02
4s
26h
1
“n” such that maximum chip erase time-out = 2n times typical
26:
--00
NA



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