JS28F256P33BFE datasheet(29/90 Pages) MICRON

29 / 90 page

Datasheet

Aug 2009

Order Number:320003-08

P33-65nm

The status register can be examined for Blank Check progress and errors by reading

any address within the block being accessed. During a blank check operation, the

Status Register indicates a busy status (SR7 = 0). Upon completion, the Status

any errors, and then cleared. If the Blank Check operation fails, which means the block

is not completely erased, the Status

9.3

Erase Suspend

Issuing the Erase Suspend command while erasing suspends the block erase operation.

This allows data to be accessed from memory locations other than the one being

erased. The Erase Suspend command can be issued to any device address. A block

erase operation can be suspended to perform a word or buffer program operation, or a

read operation within any block except the block that is erase suspended (see

Figure 37, “Erase Suspend/Resume Flowchart” on page 78).

When a block erase operation is executing, issuing the Erase Suspend command

requests the WSM to suspend the erase algorithm at predetermined points. The device

continues to output Status Register data after the Erase Suspend command is issued.

Block erase is suspended when Status Register bits SR[7,6] are set. Suspend latency is

specified in Section 15.5, “Program and Erase Characteristics” on page 58.

To read data from the device (other than an erase-suspended block), the Read Array

command must be issued. During Erase Suspend, a Program command can be issued

to any block other than the erase-suspended block. Block erase cannot resume until

program operations initiated during erase suspend complete. Read Array, Read Status

during Erase Suspend. Additionally, Clear Status Register, Program, Program Suspend,

Block Lock, Block Unlock, and Block Lock-Down are valid commands during Erase

Suspend.

During an erase suspend, deasserting CE# places the device in standby, reducing

active current. VPP must remain at a valid level, and WP# must remain unchanged

while in erase suspend. If RST# is asserted, the device is reset.

9.4

Erase Resume

The Erase Resume command instructs the device to continue erasing, and

automatically clears SR[7,6]. This command can be written to any address. If status

instruction. RST# must remain deasserted.

9.5

Erase Protection

When VPP = VIL, absolute hardware erase protection is provided for all device blocks. If

VPP is at or below VPPLK, erase operations halt and SR.3 is set indicating a VPP-level

error.

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