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JS28F256P33BFE 数据表(PDF) 41 Page - Micron Technology

部件名 JS28F256P33BFE
功能描述  NumonyxTM StrataFlash Embedded Memory
PDF  90 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  MICRON [Micron Technology]
网页  http://www.micron.com
标志 MICRON - Micron Technology

JS28F256P33BFE 数据表(HTML) 41 Page - Micron Technology

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Datasheet
Aug 2009
41
Order Number:320003-08
P33-65nm
The OTP Registers contain OTP bits; when programmed, PR bits cannot be erased. Each
OTP Register can be accessed multiple times to program individual bits, as long as the
register remains unlocked.
Each OTP Register has an associated Lock Register bit. When a Lock Register bit is
programmed, the associated OTP Register can only be read; it can no longer be
programmed. Additionally, because the Lock Register bits themselves are OTP, when
programmed, Lock Register bits cannot be erased. Therefore, when a OTP Register is
locked, it cannot be unlocked.
.
11.2.1
Reading the OTP Registers
The OTP Registers can be read from any address. To read the OTP Register, first issue
the Read Device Identifier command at any address to place the device in the Read
Device Identifier state (see Section 6.2, “Device Command Bus Cycles” on page 18).
Next, perform a read operation using the address offset corresponding to the register
to be read. Table 8, “Device Identifier Information” on page 22 shows the address
offsets of the OTP Registers and Lock Registers. PR data is read 16 bits at a time.
Figure 12: OTP Register Map
0x89
Lock Register 1
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
0x102
0x109
0x8A
0x91
128-bit Protection Register 16
(User-Programmable)
128-bit Protection Register 1
(User-Programmable)
0x88
0x85
64-bit Segment
(User-Programmable)
0x84
0x81
0x80
Lock Register 0
64-bit Segment
(Factory-Programmed)
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
128-Bit Protection Register 0



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