JS28F256P33BFE datasheet(89/90 Pages) MICRON

89 / 90 page

Datasheet

Aug 2009

Order Number:320003-08

P33-65nm

Appendix C Revision History

Date

Revision Description

May 2008

Initial release

June 2008

Corrected SCSP order information

July 2008

Added W28 AC specification;

Fixed Buffered Program Command error in figure 38;

Updated block locking state diagram;

Updated Address range in Memory Map figure;

Changed LSB Address from A0 to A1 in figure7 under dual die configurations section;

Changed LSB Address in ballout and pinout description from A0 back to A1 to match P33 130nm.

Sep 2008

Updated AxcellTM trademark;

Remove 64M related content;

Nov 2008

Update the Buffer program flowchart to reflect the read status register;

minor wording modification;

Return to StrataFlash;

Update the buffer program comments for cross 512-Word boundary;

Remove 128M related contents from this document;

Correct A24 to A25 for virtual CE description in section 1.3;

Remove Numonyx Confidential;

Dec 2008

Correct Page buffer address bits to Four on

Section 7.1, “Asynchronous Page-Mode

Read” on page 21.

Correct VHH to VPPH on Table 19, “DC Current Characteristics” on page 46 note.

Apr 2009

Add 512 Mbit (256/256) memory map in

Figure 1, “P33-65nm Memory Map” on

page 7

Correct RCR.4, RCR.5, RCR.7 and RCR.9 definitions in

Table 11, “Read Configuration

Correct A0 to A1 signal naming and remove invalid x8 information in Table 29, “Example of

Query Structure Output of x16 Devices” on page 62

Aug 2009

Update the Block lock Operations, Program Suspend/Resume, Erase Suspend/Resume flowcharts in

Figure 36, Figure 37, Figure 37, backward compatible with 130nm.

Align the sequence error description in

Table 11.

Add TSOP 40Mhz Burst Spec, fCLK, tCLK, tCHQV, tCHTV.

Add note 7 in buffer program flowchart

Figure 33.

Update VIL undershoot and overshoot of Note 2 in Table 20.

Update CFI 0x2A data in

Section A.1, “Common Flash Interface” .

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