ADE7932 datasheet(113/120 Pages) AD

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Data Sheet

ADE7978/ADE7933/ADE7932

Rev. 0 | Page 113 of 120

Table 51. APHCAL, BPHCAL, CPHCAL Registers (Address 0xE614, Address 0xE615, Address 0xE616)

Bits

Bit Name

Default Value

Description

[9:0]

PHCALVAL

0000000000

If current channel compensation is necessary, these bits can be set to a value from 0 to 383.

If voltage channel compensation is necessary, these bits can be set to a value from 512 to

895. If the PHCALVAL bits are set to values from 384 to 511, the compensation behaves in

the same way as when the PHCALVAL bits are set to values from 0 to 127. If the PHCALVAL

bits are set to values from 896 to 1023, the compensation behaves in the same way as

when the PHCALVAL bits are set to values from 512 and 639.

[15:10]

Reserved

000000

Reserved. These bits do not manage any functionality.

Table 52. PHSIGN Register (Address 0xE617)

Bits

Bit Name

Default Value

Description

AWSIGN

0: the Phase A active power (total or fundamental, as specified by Bit 0 (REVAPSEL) in the

MMODE register) is positive.

1: the Phase A active power (total or fundamental, as specified by Bit 0 (REVAPSEL) in the

MMODE register) is negative.

BWSIGN

0: the Phase B active power (total or fundamental, as specified by Bit 0 (REVAPSEL) in the

MMODE register) is positive.

1: the Phase B active power (total or fundamental, as specified by Bit 0 (REVAPSEL) in the

MMODE register) is negative.

CWSIGN

0: the Phase C active power (total or fundamental, as specified by Bit 0 (REVAPSEL) in the

MMODE register) is positive.

1: the Phase C active power (total or fundamental, as specified by Bit 0 (REVAPSEL) in the

MMODE register) is negative.

SUM1SIGN

0: the sum of all phase powers in the CF1 datapath is positive.

1: the sum of all phase powers in the CF1 datapath is negative. Phase powers in the CF1

datapath are identified by Bits[2:0] (TERMSEL1[x]) of the COMPMODE register and by

Bits[2:0] (CF1SEL[2:0]) of the CFMODE register.

AVARSIGN

0: the Phase A reactive power (total or fundamental, as specified by Bit 1 (REVRPSEL) in the

MMODE register) is positive.

1: the Phase A reactive power (total or fundamental, as specified by Bit 1 (REVRPSEL) in the

MMODE register) is negative.

BVARSIGN

0: the Phase B reactive power (total or fundamental, as specified by Bit 1 (REVRPSEL) in the

MMODE register) is positive.

1: the Phase B reactive power (total or fundamental, as specified by Bit 1 (REVRPSEL) in the

MMODE register) is negative.

CVARSIGN

0: the Phase C reactive power (total or fundamental, as specified by Bit 1 (REVRPSEL) in the

MMODE register) is positive.

1: the Phase C reactive power (total or fundamental, as specified by Bit 1 (REVRPSEL) in the

MMODE register) is negative.

SUM2SIGN

0: the sum of all phase powers in the CF2 datapath is positive.

1: the sum of all phase powers in the CF2 datapath is negative. Phase powers in the CF2

datapath are identified by Bits[5:3] (TERMSEL2[x]) of the COMPMODE register and by

Bits[5:3] (CF2SEL[2:0]) of the CFMODE register.

SUM3SIGN

0: the sum of all phase powers in the CF3 datapath is positive.

1: the sum of all phase powers in the CF3 datapath is negative. Phase powers in the CF3

datapath are identified by Bits[8:6] (TERMSEL3[x]) of the COMPMODE register and by

Bits[8:6] (CF3SEL[2:0]) of the CFMODE register.

[15:9]

Reserved

000 0000

Reserved. These bits are always set to 0.

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