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RM0352 数据表(PDF) 124 Page - STMicroelectronics |
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RM0352 数据表(HTML) 124 Page - STMicroelectronics |
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124 / 138 page ![]() UART (universal asynchronous receive transmit) RM0352 124/138 DocID024647 Rev 1 12.6.5 Integer baud rate register, UARTIBRD The UARTIBRD register is the integer part of the baud rate divisor value. Table 119 lists the register bit assignments. 12.6.6 Fractional baud rate register, UARTFBRD The UARTFBRD register is the fractional part of the baud rate divisor value. Table 120 lists the register bit assignments. The baud rate divisor is calculated as follows: • Baud rate divisor BAUDDIV = (FUARTCLK / (16 × Baud rate)) where FUARTCLK is the UART reference clock frequency. The BAUDDIV is comprised of the integer value (BAUD DIVINT) and the fractional value (BAUD DIVFRAC). Note: The contents of the UARTIBRD and UARTFBRD registers are not updated until transmission or reception of the current character is complete. The minimum divide ratio possible is 1 and the maximum is 65535(216 - 1). That is, UARTIBRD = 0 is invalid and UARTFBRD is ignored when this is the case. Similarly, when UARTIBRD = 65535 (that is 0xFFFF), then UARTFBRD must not be greater than zero. If this is exceeded it results in an aborted transmission or reception. Example 1 is an example of how to calculate the divisor value. Example 1 Calculating the divisor value If the required baud rate is 230400 and UARTCLK = 4 MHz then: baud rate divisor = (4 × 106) / (16 × 230400) = 1.085 This means BRD I = 1 and BRD F = 0.085. Therefore, fractional part, m = integer [(0.085 × 64) + 0.5] = 5 Generated baud rate divider = 1 + 5/64 = 1.078 Generated baud rate = (4 × 10 6 ) / (16 × 1.078) = 231911 Error = (231911 - 230400) / 230400 × 100 = 0.656% Table 119. UARTIBRD register Bits Name Function 15:0 BAUD DIVINT The integer baud rate divisor. These bits are cleared to 0 on reset. Table 120. UARTFBRD register Bits Name Function 5:0 BAUD DIVFRAC The fractional baud rate divisor. It results from formula: integer (fract ional part of BAUDDIV x 64) + 0.5 These bits are cleared to 0 on reset. |
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