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RM0319 数据表(PDF) 295 Page - STMicroelectronics |
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RM0319 数据表(HTML) 295 Page - STMicroelectronics |
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295 / 368 page ![]() RM0319 Digital audio port (I2S) Doc ID 022640 Rev 3 295/368 27.7.3 Programming FIFO thresholds The I2S controller has programmable thresholds for the transmit and the receive FIFOs. Changing the thresholds changes the frequency of the interrupts received. To reprogram levels during operation, write to: ● The transmit channel empty trigger (TXCHET) bits of the transmit FIFO configuration register (TFCR0[3:0]) ● The receive channel data trigger (RXCHDT) bits of the receive FIFO configuration register (RFCR0[3:0]) 27.7.4 Exchanging data with system memory System DMAC can also be used to transfer data to and from the I2S IP; DMA request and clear lines perform the handshake with DMAC. The internal interrupt mechanism implements DMAC handshaking. ● Tx: interrupt intr_emp_tx is generated upon reaching the threshold value. This interrupt also results in the generation of a DMA request to DMAC. ● Rx: a DMA request is generated at the assertion of interrupt intr_da_rx. The DMAC clears the request lines. |
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