RM0319 datasheet(293/368 Pages) STMICROELECTRONICS

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RM0319

Digital audio port (I2S)

Doc ID 022640 Rev 3

293/368

27.4.3

Audio data interface

The default value of audio data for the TX/RX Channel is 32 bits. It can be reprogrammed

during operation to any supported audio data resolution that is less than 32 bits.

Valid values: 12, 16, 20, 24, or 32 bits.

Changes to the resolution are programmed my means of the word length (WLEN) bits of the

transmitter/receive configuration registers (TCR0[2:0]/RCR0[2:0]. The channel must be

disabled prior to any resolution changes.

27.4.4

External I2S_CLK gating and enable signal

When the audio data resolution of the receive and transmit channels is less than the current

word select size, the I2S_CLK can be gated off for the remainder of the left/right cycle. This

can be programmed during operation of the component by setting the I2S_CLK Gating

(SCLKG) bits [2:0] in the Clock Configuration Register (CCR).

The clock generation block must be disabled prior to any changes to I2S_CLK gating value.

27.5

Clocks

Figure 104. I2S clocks

PLL2

RAS_CLK_SYNT3

Clksel

(from configuration

registers)

DIV4

sclk

I2S

audio_over_samp_clk

I2S_CLK

I2S_LR

I2S_TX

I2S_RX

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