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PC87366 数据表(PDF) 106 Page - National Semiconductor (TI) |
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PC87366 数据表(HTML) 106 Page - National Semiconductor (TI) |
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106 / 240 page ![]() 3.0 System Wake-Up Control (SWC) (Continued) 106 www.national.com 3.4.22 CEIR Wake-Up Control Register (IRWCR) This register is set to 00h on power-up of VPP or software reset. Location: Bank 1, Offset 13h Type: R/W . Bit 76543210 Name Reserved CEIR Protocol Select Select IRRX2 Input Invert IRRXn Input Reserved CEIR Enable Reset 00000000 Bit Description 7-6 Reserved 5-4 CEIR Protocol Select Bits 5 4 Protocol 0 0 RC5 (default) 0 1 NEC/RCA 1 X Reserved 3 Select IRRX2 Input. Selects the IRRX input. 0: IRRX1 (default) 1: IRRX2 2 Invert IRRXn Input 0: Not inverted (default) 1: Inverted 1 Reserved. 0 CEIR Enable 0: CEIR is disabled. Registers are maintained, but CEIR Event Status bit (of WK0_STS) does not reflect CEIR events. (Unlike the CEIR Event Enable bit of WK0_EN that does not affect the CEIR Event Status bit.) (default) 1: CEIR is enabled |
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