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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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PC87366 数据表(PDF) 110 Page - National Semiconductor (TI) |
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PC87366 数据表(HTML) 110 Page - National Semiconductor (TI) |
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110 / 240 page  3.0 System Wake-Up Control (SWC) (Continued) 110 www.national.com 3.4.29 CEIR Wake-Up Range 3 Registers These registers define the low and high limits of time range 3. The values are represented in units of 0.1 msec. These reg- isters are not used when the RC-5 protocol is selected. For the NEC protocol, the post header gap width must fall within this range in order for the gap to be considered valid. The nominal value is 4.5 msec for a 36 KHz carrier. IRWTR3L and IRWTR3H should be set to 28h and 32h respectively (default). IRWTR3L Register This register is set to 28h on power-up of Vpp or software reset. Location: Bank1, Offset 1Eh Type: R/WS IRWTR3H Register This register is set to 32h on power-up of Vpp or software reset. Location: Bank 1, Offset 1Fh Type: R/W CEIR Recommended Values Table 43 lists the recommended time ranges limits for the different protocols and their four applicable ranges. The values are represented in hexadecimal code where the units are of 0.1 msec. Bit 76543210 Name CEIR Pulse Change, Range 3, Low Limit Reset 00101000 Bit 76543210 Name CEIR Pulse Change, Range 3, High Limit Reset 00110010 Table 43. Time Range Limits for CEIR Protocols Range RC-5 NEC RCA Low Limit High Limit Low Limit High Limit Low Limit High Limit 0 10h 14h 09h 0Dh 0Ch 12h 1 07h 0Bh 14h 19h 16h 1Ch 2 −− 50h 64h B4h DCh 3 −− 28h 32h 23h 2Dh |
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