 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
PC87366 数据表(PDF) 115 Page - National Semiconductor (TI) |
|
|
|
|||||||||||||||||||||||||||||
PC87366 数据表(HTML) 115 Page - National Semiconductor (TI) |
|
|
115 / 240 page  3.0 System Wake-Up Control (SWC) (Continued) 115 www.national.com 3.4.32 Standby GPIO Pin Configuration Register (SBGPCFG) This is a group of twelve configuration registers. Eight are identical for GPIOE and GPIE, two are identical for GPOS, and . two are identical for GPIS. Each GPIOE/GPIE register is associated with one GPIOE/GPIE pin, and each GPOS and GPIS register is associated with one GPOS or GPIS pin. The entire set is mapped to the same address. The mapping scheme is based on the Standby GPIO Pin Select (SBGPSEL) register that functions as an index register, and the specific Standby GPIO Pin Configuration register that reflects the configuration of the currently selected pin. Bits 0-3 are applicable only for pins GPIOE0-5 and GPOS0,1. Bits 4-6 are applicable for all GPIOE/GPIE pins. Location: Bank 3, Offset 14h Type: R/W (bit 3 is set only) For GPIOE and GPIE: For GPOS: For GPIS: Bit 76543210 Name Reserved Event Debounce Enable Event Polarity Event Type Lock Pull-Up Control Output Type Output Enable Reset 01000100 Bit 76543210 Name Reserved Lock Pull-Up Control Output Type Output Enable Reset 00000101 Bit 76543210 Name Reserved Reset 00000000 Bit Description 7 Reserved (for GPOS and GPIS, bits 7-4 and 7-0 are reserved, respectively) 6 Event Debounce Enable 0: Disabled 1: Enabled (default) 5 Event Polarity. This bit defines the polarity of the signal that causes a detection of an event from the corresponding GPIO pin. 0: Falling edge or low level input (default) 1: Rising edge or high level input 4 Event Type. This bit defines the signal type that causes a detection of an event from the corresponding GPIO pin. 0: Edge input (default) 1: Level input 3 Lock. This bit locks bits 2-0 of this register. These bits are associated with the GPIO pin currently selected by the SBGPSEL register. Once this bit is set to 1 by software, it can only be cleared to 0 by VSB power-up reset. 0: No effect (default at VSB power-up reset) 1: Direction, output type, pull-up and output value locked |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
