PC87366 datasheet(117/240 Pages) NSC

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3.0 System Wake-Up Control (SWC) (Continued)

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3.4.33

Standby GPIOE/GPIE Data Out Register 0 (SB_GPDO0)

This register is set to 3Fh on VPP power-up or software reset, only when the Lock bit of the SBGPCFG register is set to 0.

It determines the value to be driven on the GPIOE pins when configured as outputs.

Location:

Offset 08h

Type:

R/W

3.4.34

Standby GPIOE/GPIE Data In Register 0 (SB_GPDI0)

This register reflects the values of the GPIE7-6 and GPIOE5-0 pins. Write to this register is ignored.

Location:

Offset 09h

Type:

Bit

76543210

Name

Reserved

Data Out

Reset

00111111

Bit

Description

7-6

Reserved

Data Out. Bits 5-0 correspond to pins GPIOE5-0 respectively. The value of each bit determines the value driven

on the corresponding GPIOE pin when its output buffer is enabled. Writing to the bit latches the written data

unless the bit is locked by the corresponding GPIOE Conﬁguration Lock bit. Reading the bit returns its value,

regardless of the pin value and conﬁguration.

0: Corresponding pin level low when output enabled

1: Corresponding pin level high (according to buffer type and static pull-up selection) when output enabled

Bit

76543210

Name

Data In

Reset

XXXXXXXX

Bit

Description

Data In. Bits 7-0 correspond to pins GPIE7-6 and GPIOE5-0 respectively. Reading each bit returns the value of

the corresponding GPIE/GPIOE pin regardless of the pin conﬁguration and the SB0_GPDO register value.

0: Corresponding pin level low

1: Corresponding pin level high

PC87366 数据表(PDF) 117 Page - National Semiconductor (TI)

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