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PC87366 数据表(PDF) 229 Page - National Semiconductor (TI) |
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PC87366 数据表(HTML) 229 Page - National Semiconductor (TI) |
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229 / 240 page  14.0 Device Characteristics (Continued) 229 www.national.com 14.2.12 Input, Analog Symbol: INAN3 Input, analog to TMS. 14.2.13 Output, Analog Symbol: OAN1 Output, analog to reference voltage. 14.2.14 Output, Analog Symbol: OAN2 Output, analog to TMS. 14.2.15 Exceptions 1. All pins are back-drive protected, except for the output pins with PCI Buffer Type. 2. The following pins have a static pull-up resistor and therefore may have input leakage current (when VIN =VSS) of about (-)160 µA: ACK, AFD_DSTRB, ERR, GPIO40-47, GPIO30-34, GPIO20-27, GPIO16-17, GPIO10-14, GPIO00-07, INIT, P12, P16, P17, PE, SLIN_ASTRB, STB_WRITE 3. The following pins have a static pull-down resistor and therefore may have input leakage current (when VIN =VDD)of about 130 µA: BUSY_WAIT, PE, SLCT 4. Output from SLCT, BUSY_WAIT (and PE if bit 2 of PP Confg0 Register is “0”) is open-drain in all SPP modes, except in SPP Compatible mode when the setup mode is ECP-based FIFO and bit 4 of the Control2 parallel port register is 1. Otherwise, output from these signals is level 2. External 4.7 KW pull-up resistors should be used. 5. Output from ACK, ERR (and PE if bit 2 of PP Confg0 Register is set to 1) is open-drain in all SPP modes, except in SPP Compatible mode when the setup mode is ECP-based FIFO and bit 4 of the Control2 parallel port register is set to 1. Otherwise, output from these signals is level 2. External 4.7 KW pull-up resistors should be used. 6. Output from STB, AFD, INIT, SLIN is open-drain in all SPP modes, except in SPP Compatible mode when the setup mode is ECP-based (FIFO). Otherwise, output from these signals is level 2. External 4.7 K Ω pull-up resistors should be used. 7. Output from PD7-0 is open-drain in all SPP modes, except in SPP Compatible mode when the setup mode is ECP-based (FIFO) and bit 4 of the Control2 parallel port register is 1. Otherwise, output from these signals is Level 2. External 4.7 K Ω pull-up resistors should be used. 8. IOH is valid for a GPIO pin only when it is not configured as open-drain. 9. P12, P16 and P17 are driven high for about 100 ns after a low-to-high transition, during which it is capable of sourcing 2 mA. Symbol Parameter Conditions Min Typ Max Unit VDN D- Source Voltage 0.7 V Symbol Parameter Conditions Min Typ Max Unit VREFE External Reference Voltage 1.233 1.235 1.237 V RVREFE V REF Input DC resistance Note 1. Note 1. Valid only for external VREF; value changes during the conversion. 536 K Ω Symbol Parameter Conditions Min Typ Max Unit IDPH Diode Source Current D+ = D- + 0.65V; High Level 80 120 µA IDPL Low Level 8 12 µA |
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