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数据搜索系统，热门电子元器件搜索 |
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PC87366 数据表(PDF) 230 Page - National Semiconductor (TI) |
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PC87366 数据表(HTML) 230 Page - National Semiconductor (TI) |
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230 / 240 page  14.0 Device Characteristics (Continued) 230 www.national.com 14.3 INTERNAL RESISTORS 14.3.1 Pull-Up Resistor Symbol: PUnn. 14.3.2 Pull-Down Resistor Symbol: PDnn. 14.4 ANALOG CHARACTERISTICS 14.4.1 VLM 14.4.2 TMS Symbol Parameter Conditions Typical Min Max Unit RPU Pull-up equivalent resistance VDD = 3.3V nn nn-30% nn+30% K Ω Symbol Parameter Conditions Typical Min Max Unit RPD Pull-down equivalent resistance VDD = 3.3V nn nn-30% nn+30% K Ω Symbol Parameter ConditionsNote 1. Note 1. All parameters specified for 0 ° C ≤ T A ≤ 70° C. AVCC= 3.3V ± 10% unless otherwise specified and VREF = 1.211. Min Typ Max Unit VRES Resolution 8 bit VINL Integral (non-linearity) ErrorNote 2. Note 2. The maximum difference between the ideal straight line reference and the actual conversion curves. This parameter is only partially tested in production, and is guaranteed by characteriza- tion. ±2.0 ±3.0 LSB Note 3. Note 3. The parameter value XX LSB means XX times the value of one least significant bit, where VREF is the typical VREF. VIREF Internal Reference Voltage ±2.203 1.211 ±2.219 V VDNL Differential (non-linearity) ErrorNote 4. Note 4. The maximum difference between an ideal step size of 1 LSB and any actual step size. This parameter is only partially tested in production, and is guaranteed by characterization. 0.5 LSB Note 3 VOER Offset Error ±2.0 LSB Note 3 VGER Gain Error ±2.0 LSB Note 3 VIN Input Voltage Range 0 2.45*VREF V VREF Reference Voltage InputNote 5. Note 5. When using input with value other than specified, the VREF used by the VLM changes based on the actual input value. 1.211 V tACT VLM Activation TimeNote 6. Note 6. Time from when the VLMCFG register Standby Mode Enable bit = 0 until valid conversions are possible. 100 µs |
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