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AT89C51ED2-RDTIM 数据表(PDF) 99 Page - ATMEL Corporation |
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AT89C51ED2-RDTIM 数据表(HTML) 99 Page - ATMEL Corporation |
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99 / 137 page ![]() 99 AT89C51RD2/ED2 4235E–8051–04/04 Table 71. Program Lock Bits of the SSB Note: U: Unprogrammed or "one" level. P: Programmed or "zero" level. X: Do not care WARNING: Security level 2 and 3 should only be programmed after Flash and code verification. Flash Memory Status AT89C51RD2/ED2 parts are delivered in standard with the ISP ROM bootloader. After ISP or parallel programming, the possible contents of the Flash memory are sum- marized in Figure 40: Figure 40. Flash Memory Possible Contents Memory Organization When the EA pin is high, the processor fetches instructions from internal program Flash. If the EA pin is tied low, all program memory fetches are from external memory. Program Lock Bits Protection Description Security Level LB0 LB1 1 U U No program lock features enabled. 2 P U ISP programming of the Flash is disabled. 3 X P Same as 2, also verify through ISP programming interface is disabled. 0000h Virgin Default After ISP After Parallel Programming After Parallel Programming After Parallel Programming Application Application Virgin After ISP or Dedicated ISP Dedicated ISP Application Virgin or Application Virgin or Application FFFFh |
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