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AT89C51ED2-RDTIM 数据表(PDF) 35 Page - ATMEL Corporation |
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AT89C51ED2-RDTIM 数据表(HTML) 35 Page - ATMEL Corporation |
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35 / 137 page  35 AT89C51RD2/ED2 4235E–8051–04/04 Table 21. T2MOD Register T2MOD - Timer 2 Mode Control Register (C9h) Reset Value = XXXX XX00b Not bit addressable 76 54 32 1 0 -- --- - T2OE DCEN Bit Number Bit Mnemonic Description 7- Reserved The value read from this bit is indeterminate. Do not set this bit. 6- Reserved The value read from this bit is indeterminate. Do not set this bit. 5- Reserved The value read from this bit is indeterminate. Do not set this bit. 4- Reserved The value read from this bit is indeterminate. Do not set this bit. 3- Reserved The value read from this bit is indeterminate. Do not set this bit. 2- Reserved The value read from this bit is indeterminate. Do not set this bit. 1T2OE Timer 2 Output Enable bit Cleared to program P1.0/T2 as clock input or I/O port. Set to program P1.0/T2 as clock output. 0 DCEN Down Counter Enable bit Cleared to disable Timer 2 as up/down counter. Set to enable Timer 2 as up/down counter. |
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