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AT89C51ED2-RDTIM 数据表(PDF) 43 Page - ATMEL Corporation |
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AT89C51ED2-RDTIM 数据表(HTML) 43 Page - ATMEL Corporation |
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43 / 137 page  43 AT89C51RD2/ED2 4235E–8051–04/04 Table 27. CCAPnL Registers (n = 0 - 4) CCAP0L - PCA Module 0 Compare/Capture Control Register Low (0EAh) CCAP1L - PCA Module 1 Compare/Capture Control Register Low (0EBh) CCAP2L - PCA Module 2 Compare/Capture Control Register Low (0ECh) CCAP3L - PCA Module 3 Compare/Capture Control Register Low (0EDh) CCAP4L - PCA Module 4 Compare/Capture Control Register Low (0EEh) Reset Value = 0000 0000b Not bit addressable Table 28. CH Register CH - PCA Counter Register High (0F9h) Reset Value = 0000 0000b Not bit addressable Table 29. CL Register CL - PCA Counter Register Low (0E9h) Reset Value = 0000 0000b Not bit addressable 76 54 32 1 0 -- --- -- - Bit Number Bit Mnemonic Description 7 - 0 - PCA Module n Compare/Capture Control CCAPnL Value 76 54 32 1 0 -- --- -- - Bit Number Bit Mnemonic Description 7 - 0 - PCA counter CH Value 76 54 32 1 0 -- --- -- - Bit Number Bit Mnemonic Description 7 - 0 - PCA Counter CL Value |
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