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AT89C51ED2-RDTIM 数据表(PDF) 53 Page - ATMEL Corporation |
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AT89C51ED2-RDTIM 数据表(HTML) 53 Page - ATMEL Corporation |
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53 / 137 page  53 AT89C51RD2/ED2 4235E–8051–04/04 Table 32. Baud Rate Selection Table UART Internal Baud Rate Generator (BRG) When the internal Baud Rate Generator is used, the Baud Rates are determined by the BRG overflow depending on the BRL reload value, the value of SPD bit (Speed Mode) in BDRCON register and the value of the SMOD1 bit in PCON register. Figure 26. Internal Baud Rate • The baud rate for UART is token by formula: TCLK (T2CON) RCLK (T2CON) TBCK (BDRCON) RBCK (BDRCON) Clock Source UART Tx Clock Source UART Rx 0000 Timer 1 Timer 1 1000 Timer 2 Timer 1 0100 Timer 1 Timer 2 1100 Timer 2 Timer 2 X 010 INT_BRG Timer 1 X 110 INT_BRG Timer 2 0 X 0 1 Timer 1 INT_BRG 1 X 0 1 Timer 2 INT_BRG X X 1 1 INT_BRG INT_BRG BRG 0 1 /6 BRL /2 0 1 INT_BRG SPD BRR SMOD1 auto reload counter overflow FPER Baud_Rate = 6(1-SPD) ⋅ 32 ⋅ (256 -BRL) 2SMOD1 ⋅ F PER BRL = 256 - 6(1-SPD) ⋅ 32 ⋅ Baud_Rate 2 SMOD1 ⋅ F PER |
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