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数据搜索系统，热门电子元器件搜索 |
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AT89C51ED2-RDTIM 数据表(PDF) 30 Page - ATMEL Corporation |
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AT89C51ED2-RDTIM 数据表(HTML) 30 Page - ATMEL Corporation |
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30 / 137 page  30 AT89C51RD2/ED2 4235E–8051–04/04 The Power fail detect monitor the supply generated by the voltage regulator and gener- ate a reset if this supply falls below a safety threshold as illustrated in the Figure 13 below. Figure 13. Power Fail Detect When the power is applied, the Power Monitor immediately asserts a reset. Once the internal supply after the voltage regulator reach a safety level, the power monitor then looks at the XTAL clock input. The internal reset will remain asserted until the Xtal1 lev- els are above and below VIH and VIL. Further more. An internal counter will count 1024 clock periods before the reset is de-asserted. If the internal power supply falls below a safety level, a reset is immediately asserted. . Vcc t Reset Vcc |
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