ZUSBOPTSC01ZAC datasheet(120/402 Pages) ZILOG

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General-Purpose Timer

P R E L I M I N A R Y

PS024604-1005

Z8 Encore!® Motor Control Flash MCUs

Product Specification

The Timer Output signal begins with a value equal to TPOL and then transitions to TPOL

when the timer value matches the PWM value. The Timer Output signal returns to TPOL

after the timer reaches the reload value, and is reset to 0001h.

In PWM DUAL OUTPUT mode, the timer also generates a second PWM output signal,

Timer Output Complement (TOUT). A programmable deadband can be configured (PWMD

field) to delay (0–128 system clock cycles) the Low to a High (inactive to active) output

transitions on these two pins. This configuration ensures a time gap between the deasser-

tion of one PWM output to the assertion of its complement.

The steps for configuring a timer for either PWM SINGLE or DUAL OUTPUT mode and

initiating PWM operation are as follows:

1. Write to the Timer Control registers to:

a. Disable the timer.

b. Configure the timer for the selected PWM mode.

c. Set the prescale value.

d. Set the initial logic level (High or Low) and PWM High/Low transition for the

Timer Output alternate function with the TPOL bit.

e. Set the deadband delay (DUAL OUTPUT mode) with the PWMD field.

2. Write to the Timer High and Low Byte registers to set the starting count value (typi-

cally 0001h). The starting count value only affects the first pass in PWM mode. After

the first timer reset in PWM mode, counting begins at the reset value of 0001h.

3. Write to the PWM High and Low Byte registers to set the PWM value.

4. Write to the Timer Reload High and Low Byte registers to set the reload value (PWM

period). The reload value must be greater than the PWM value.

5. If appropriate, enable the timer interrupt and set the timer interrupt priority by writing

to the relevant interrupt registers.

6. Configure the associated GPIO port pin(s) for the Timer Output alternate function.

7. Write to the Timer Control 1 Register to enable the timer and initiate counting.

The PWM period is determined by the following equation:

If an initial starting value other than 0001h is loaded into the Timer High and Low Byte

registers, use the ONE-SHOT mode equation to determine the first PWM time-out period.

PWM Period(s) =

Reload Value x Prescaler

System Clock Frequency (Hz)

ZUSBOPTSC01ZAC 数据表(PDF) 120 Page - Zilog, Inc.

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