ZUSBOPTSC01ZAC datasheet(124/402 Pages) ZILOG

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General-Purpose Timer

P R E L I M I N A R Y

PS024604-1005

Z8 Encore!® Motor Control Flash MCUs

Product Specification

102

The timer counts up to the 16-bit reload value stored in the Timer Reload High and Low

Byte registers. When reaching the reload value, the timer generates an interrupt, the count

value in the Timer High and Low Byte registers is reset to 0001h, and counting continues

as long as the Timer Input signal is active. Also, if the Timer Output alternate function is

enabled, the Timer Output pin changes state (from Low to High or from High to Low) at

timer reload.

The steps for configuring a timer for GATED mode and initiating the count are as follows:

1. Write to the Timer Control registers to:

a. Disable the timer.

b. Configure the timer for GATED mode.

c. Set the prescale value.

d. Select the active state of the Timer Input via the TPOL bit.

2. Write to the Timer High and Low Byte registers to set the starting count value. This

setting only affects the first pass in GATED mode. After the first timer reset in

GATED mode, counting begins at the reset value of 0001h.

3. Write to the Timer Reload High and Low Byte registers to set the reload value.

4. If appropriate, enable the timer interrupt and set the timer interrupt priority by writing

to the relevant interrupt registers.

5. Configure the timer interrupt to be generated only at the input deassertion event, the

reload event, or both, by setting the TICONFIG field of the Timer Control 0 Register.

6. Configure the associated GPIO port pin for the Timer Input alternate function.

7. Write to the Timer Control 1 Register to enable the timer.

8. The timer counts when the Timer Input is equal to the TPOL bit.

Reading the Timer Count Values

The current count value in the timers can be read while counting (enabled). This Read has

no effect on timer operation. When the timer is enabled and the Timer High Byte Register

is read, the contents of the Timer Low Byte Register are placed into a holding register. A

subsequent Read from the Timer Low Byte Register returns the value in the holding regis-

ter. This operation allows accurate Reads of the full 16-bit timer count value while

enabled. When the timer is not enabled, a Read from the Timer Low Byte Register returns

the actual value in the counter.

Timer 0 High and Low Byte Registers

The Timer 0 High and Low Byte (T0H and T0L) registers, shown in Tables 58 and 59,

contain the current 16-bit timer count value. When the timer is enabled, a Read from T0H

ZUSBOPTSC01ZAC 数据表(PDF) 124 Page - Zilog, Inc.

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