 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
ZUSBOPTSC01ZAC 数据表(PDF) 125 Page - Zilog, Inc. |
|
|
|||||||||||||||||||||||||||||
ZUSBOPTSC01ZAC 数据表(HTML) 125 Page - Zilog, Inc. |
|
|
125 / 402 page  PS024604-1005 P R E L I M I N A R Y Timer 0 High and Low Byte Registers Z8FMC16100 Series Flash MCU Product Specification 103 causes the value in T0L to be stored in a temporary holding register. A Read from T0L always returns this temporary register when the timer is enabled. When the timer is dis- abled, Reads from the T0L are direct from this temporary register. Writing to the Timer High and Low Byte registers while the timer is enabled is not rec- ommended. There are no temporary holding registers available for Write operations; therefore, simultaneous 16-bit Writes are not possible. If either the Timer High or Low Byte registers are written during counting, the 8-bit writ- ten value is placed in the counter (High or Low Byte) at the next clock edge. The counter continues counting from the new value. TH and TL—Timer High and Low Bytes These two bytes, {TH[7:0], TL[7:0]}, contain the current 16-bit timer count value. Table 58. Timer 0 High Byte Register (T0H) BITS 7 6 5 4 3 2 1 0 FIELD TH RESET 00H R/W R/W ADDR F00H Table 59. Timer 0 Low Byte Register (T0L) BITS 7 6 5 4 3 2 1 0 FIELD TL RESET 01H R/W R/W ADDR F01H Caution: |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
