ZUSBOPTSC01ZAC datasheet(130/402 Pages) ZILOG

130 / 402 page

General-Purpose Timer

P R E L I M I N A R Y

PS024604-1005

Z8 Encore!® Motor Control Flash MCUs

Product Specification

108

Bit

Position

Value

(H)

Description

[7]

TEN

Timer Enable

Timer is disabled.

Timer enabled.

[6]

TPOL

Timer Input/Output Polarity

This bit is a function of the current operating mode of the timer. It determines the

polarity of the input and/or output signal. When the timer is disabled, the Timer

Output signal is set to the value of this bit.

ONE-SHOT mode–If the timer is enabled the Timer Output signal pulses

(changes state) for one system clock cycle after timer Reload.

CONTINUOUS mode–If the timer is enabled the Timer Output signal is

complemented after timer Reload.

COUNTER mode–If the timer is enabled the Timer Output signal is

complemented after timer reload.

0 = Count occurs on the rising edge of the Timer Input signal.

1 = Count occurs on the falling edge of the Timer Input signal.

PWM SINGLE OUTPUT mode–When enabled, the Timer Output is forced to

TPOL after PWM count match and forced back to TPOL after Reload.

CAPTURE mode–If the timer is enabled the Timer Output signal is

complemented after timer Reload.

0 = Count is captured on the rising edge of the Timer Input signal.

1 = Count is captured on the falling edge of the Timer Input signal.

COMPARE mode–The Timer Output signal is complemented after timer

Reload.

GATED mode–The Timer Output signal is complemented after timer Reload.

0 = Timer counts when the Timer Input signal is High and interrupts are

generated on the falling edge of the Timer Input.

1 = Timer counts when the Timer Input signal is Low and interrupts are

generated on the rising edge of the Timer Input.

CAPTURE/COMPARE mode–If the timer is enabled, the Timer Output signal is

complemented after timer Reload

0 = Counting starts on the first rising edge of the Timer Input signal. The current

count is captured on subsequent rising edges of the Timer Input signal.

1 = Counting starts on the first falling edge of the Timer Input signal. The

current count is captured on subsequent falling edges of the Timer Input signal.

ZUSBOPTSC01ZAC 数据表(PDF) 130 Page - Zilog, Inc.

ZUSBOPTSC01ZAC 数据表(HTML) 130 Page - Zilog, Inc.

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