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ZUSBOPTSC01ZAC 数据表(PDF) 163 Page - Zilog, Inc. |
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ZUSBOPTSC01ZAC 数据表(HTML) 163 Page - Zilog, Inc. |
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163 / 402 page ![]() PS024604-1005 P R E L I M I N A R Y LIN-UART Baud Rate High and Low Byte Z8FMC16100 Series Flash MCU Product Specification 141 The LIN-UART data rate is calculated using the following equation for standard UART modes. For LIN protocol, the Baud Rate registers must be programmed with the baud period rather than 1/16 baud period. The UART must be disabled when updating the Baud Rate registers because the high and low registers must be written independently. The LIN-UART data rate is calculated using the following equation for standard UART operation: The LIN-UART data rate is calculated using the following equation for LIN mode UART operation: For a given LIN-UART data rate, the integer baud rate divisor value is calculated using the following equation for standard UART operation: For a given LIN-UART data rate, the integer baud rate divisor value is calculated using the following equation for LIN mode UART operation: Table 77. LIN-UART Baud Rate Low Byte Register (U0BRL) BITS 7 6 5 4 3 2 1 0 FIELD BRL RESET FFH R/W R/W ADDR F47H UART Data Rate (bits per second) = System Clock Frequency (Hz) 16 x UART Baud Rate Divisor Value UART Data Rate (bits per second) = System Clock Frequency (Hz) UART Baud Rate Divisor Value Note: UART Baud Rate Divisor Value (BRG) Round System Clock Frequency (Hz) 16 xUART Data Rate (bits/s) ------------------------------------------------------------------------------- = UART Baud Rate Divisor Value (BRG) Round System Clock Frequency (Hz) UART Data Rate (bits/s) ------------------------------------------------------------------------------- = |
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