ZUSBOPTSC01ZAC datasheet(224/402 Pages) ZILOG

224 / 402 page

Analog-to-Digital Converter

P R E L I M I N A R Y

PS024604-1005

Z8 Encore!® Motor Control Flash MCUs

Product Specification

202

Figure 38 illustrates the timing of an ADC convert period.

ADC Interrupt

The ADC can generate an interrupt request when a conversion has been completed. An

interrupt request that is pending when the ADC is disabled is not automatically cleared.

ADC Timer 0 Capture

The Timer 0 count is captured for every ADC conversion. The capture of the Timer 0

count occurs after the programmed sample time is complete for every conversion and

stored in the ADC Timer Capture Register (ADCTCAP).

Reference Buffer

The reference buffer, RBUF, supplies the reference voltage for the ADC. When enabled,

the internal voltage reference generator supplies the ADC and the voltage is available on

the VREF pin. When RBUF is disabled, the ADC must have the reference voltage supplied

externally through the VREF pin. RBUF is controlled by the REFEN bit in the ADC Control

Internal Voltage Reference Generator

The Internal Voltage Reference Generator provides the voltage, VR2, for the RBUF. VR2

is 2 volts.

Figure 38. ADC Convert Timing

13-Clock

Convert Period

ADC Clock

BUSY

ZUSBOPTSC01ZAC 数据表(PDF) 224 Page - Zilog, Inc.