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ZUSBOPTSC01ZAC 数据表(PDF) 227 Page - Zilog, Inc. |
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ZUSBOPTSC01ZAC 数据表(HTML) 227 Page - Zilog, Inc. |
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227 / 402 page ![]() PS024604-1005 P R E L I M I N A R Y ADC Data Low Bits Register Z8FMC16100 Series Flash MCU Product Specification 205 ADC Data Low Bits Register The ADC Data Low Bits Register, shown in Table 107, contain the lower bits of the ADC output as well as an overflow status bit. Access to the ADC Data Low Bits Register is Read- Only. Reading the ADC Data High Byte Register latches data in the ADC Low Bits Register. Table 106. ADC Data High Byte Register (ADCD_H) BITS 7 6 5 4 3 2 1 0 FIELD ADCDH RESET X R/W R ADDR F72H Bit Position Value (H) Description [7:0] 00H–FFH ADC High Byte The last conversion output is held in the data registers until the next ADC conversion has completed. Table 107. ADC Data Low Bits Register (ADCD_L) BITS 7 6 5 4 3 2 1 0 FIELD ADCDL Reserved RESET XX R/W RR ADDR F73H Bit Position Value (H) Description [7:6] 00–11b ADC Low Bits These bits are the 2 least significant bits of the 10-bit ADC output. These bits are undefined after a Reset. The low bits are latched into this register whenever the ADC Data High Byte register is read. [5:0] Reserved 0 Reserved—Must Be 0. |
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