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ZUSBOPTSC01ZAC 数据表(PDF) 229 Page - Zilog, Inc.

部件名 ZUSBOPTSC01ZAC
功能描述  Z8 Encore-R Motor Control Flash MCUs
PDF  402 Pages
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制造商  ZILOG [Zilog, Inc.]
网页  http://www.zilog.com
标志 ZILOG - Zilog, Inc.

ZUSBOPTSC01ZAC 数据表(HTML) 229 Page - Zilog, Inc.

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PS024604-1005
P R E L I M I N A R Y
ADC Clock Prescale Register
Z8FMC16100 Series Flash MCU
Product Specification
207
ADC Clock Prescale Register
The ADC Clock Prescale Register, shown in Table 110, is used to provide a divided sys-
tem clock to the ADC. When this register is programmed with 0h, the System Clock is
used for the ADC Clock.
Table 109. Sample Hold Time (ADCST)
BITS
7
6
5
4
3
2
1
0
FIELD
Reserved
ST
RESET
01
11
1
11
R/W
R/W
R/W
ADDR
F75H
Bit
Position
Value
(H)
Description
[7:6]
0H
Reserved - Must be 0.
[5:0]
SHT
0H - FH
Sample Hold time in number of system clock periods to meet 1
µS minimum.
Table 110. ADC Clock Prescale Register (ADCCP)
BITS
7
6
5
4
3
2
1
0
FIELD
Reserved
DIV16
DIV8
DIV4
DIV2
RESET
0
00
00
R/W
R/W
ADDR
F76H
Bit
Position
Value
(H)
Description
[0]
DIV2
0
DIV2
Clock is not divided
1
System Clock is divided by 2 for ADC Clock



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