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ZUSBOPTSC01ZAC 数据表(PDF) 246 Page - Zilog, Inc. |
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ZUSBOPTSC01ZAC 数据表(HTML) 246 Page - Zilog, Inc. |
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246 / 402 page ![]() Option Bits P R E L I M I N A R Y PS024604-1005 Z8 Encore!® Motor Control Flash MCUs Product Specification 224 It is possible to alter the working values of these bits by accessing the Trim Bit Address and Data registers, but these working values are lost after a Reset. There are 32 trim addresses. To read or write these values, the user code must first write a value between 00h and 1Fh into the Trim Bit Address Register. Writing the Trim Bit Data Register changes the working value of the target trim data. Reading the Trim Bit Data Register returns the working value of the target trim data. User Option Bit Configuration By Reset Each time the user option bits are programmed or erased, the device must be Reset for the change to take place. Option Bit Address Space The first two bytes of program memory at addresses 0000h, shown in Table 122, and 0001h , shown in Table 123, are reserved for the user option bits. Program Memory Address 0000H Table 122. User Option Bits at Program Memory Address 0000H BITS 7 6 5 4 3 2 1 0 FIELD WDT_RES WDT_AO OSC_SEL[1:0] VBO_AO RP Reserved FWP RESET UU U U UU U R/W R/W R/W R/W R/W R/W R/W R/W ADDR Program Memory 0000H Note: U = Unchanged by Reset. R/W = Read/Write. Bit Position Value (H) Description [7] WDT_RES 0 Watch-Dog Timer Reset Watch-Dog Timer time-out generates an interrupt request. Interrupts must be globally enabled for the eZ8 CPU to acknowledge the interrupt request. 1 Watch-Dog Timer time-out causes a Reset. [6] WDT_AO 0 Watch-Dog Timer Always On Watch-Dog Timer is automatically enabled. 1 Watch-Dog Timer is enabled upon execution of the WDT instruction. Caution: |
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