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ZUSBOPTSC01ZAC 数据表(PDF) 344 Page - Zilog, Inc. |
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ZUSBOPTSC01ZAC 数据表(HTML) 344 Page - Zilog, Inc. |
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344 / 402 page ![]() PS024604-1005 P R E L I M I N A R Y Appendix A—Register Tables Z8 Encore!® Motor Control Flash MCUs Product Specification 322 Hex Address: F28 Bit Position Value (H) Description [7,6] Reserved Must be 0. [5, 3, 1] OUT2L/ OUT1L/ OUT0L 0 PWM 2L/1L/0L Output Configuration PWM 2L/1L/0L output signal is enabled and controlled by PWM. 1 PWM 2L/1L/0L output signal is in low-side off-state. [4, 2, 0] OUT2H/ OUT1H/ OUT0H 0 PWM 2H/1H/0H Output Configuration PWM 2H/1H/0H output signal is enabled and controlled by PWM. 1 PWM 2H/1H/0H output signal is in high-side off-state. PWM Fault Control Register (PWMFCTL) BITS 7 6 5 4 3 2 1 0 FIELD Reserved DBGRST Fault1INT Fault1RST CMPINT CMPRST Fault0INT Fault0RST RESET 0 000 00 R/W R/W R/W R/W R/W R/W R/W R/W R/W ADDR F28H Bit Position Value (H) Description [7] Reserved 0 Reserved. [6] DBGRST 0 DebugRestart Automatic recovery. PWM resumes control of outputs when all fault sources have deasserted and a new PWM period begins. 1 Software controlled recovery. PWM resumes control of outputs only after all fault sources have deasserted and all fault flags are cleared and a PWM reload occurs [5] Fault1INT 0 Fault 1 Interrupt Interrupt on comparator assertion disabled. 1 Interrupt on comparator assertion enabled. |
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