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ZUSBOPTSC01ZAC 数据表(PDF) 345 Page - Zilog, Inc. |
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ZUSBOPTSC01ZAC 数据表(HTML) 345 Page - Zilog, Inc. |
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345 / 402 page  PS024604-1005 P R E L I M I N A R Y Appendix A—Register Tables Z8FMC16100 Series Flash MCU Product Specification 323 Hex Address: F29 . [4] Fault1RST 0 Fault 1 Restart Automatic recovery. PWM resumes control of outputs when all fault sources have deasserted. 1 Software controlled recovery. PWM resumes control of outputs only after all fault sources have deasserted and all fault flags are cleared and a PWM reload occurs [3 CMP0INT 0 Comparator 0 Interrupt Interrupt on comparator 0 assertion disabled. 1 Interrupt on comparator 0 assertion enabled. [2] CMP0RST 0 Comparator 0 Restart Automatic recovery. PWM resumes control of outputs when all fault sources have deasserted. 1 Software controlled recovery. PWM resumes control of outputs only after all fault sources have deasserted and all fault flags are cleared and a PWM reload occurs [1] Fault0INT 0 Fault 0 Interrupt Interrupt on Fault0 pin assertion disabled. 1 Interrupt on Fault0 pin assertion enabled. [0] Fault0RST 0 Fault 0 Restart Automatic recovery. PWM resumes control of outputs when all fault sources have deasserted. 1 Software controlled recovery. PWM resumes control of outputs only after all fault sources have deasserted and all fault flags are cleared and a PWM reload occurs Note: This register can only be written when PWEN is cleared. Table 169. Current-Sense Trigger Control Register (PWMSHC) BITS 7 6 5 4 3 2 1 0 FIELD CSTPOL HEN NHEN LEN NLEN CSTPWM2 CSTPWM1 CSTPWM0 RESET 0 000 00 00 R/W R/WR/W R/WR/W R/WR/W R/WR/W ADDR F29H Bit Position Value (H) Description |
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